1-9
IM 707235-01E
Functions
1
1.6 Synchronizing to Other Modules Using the Bus
Trigger/Time Base Signal
Input/Output of Bus Trigger Signals
The WE7235 4-CH, 100 kS/s Accelerometer Module can output bus trigger signals
based on the results of comparing the input signal with the threshold (see 1.4 “Setting
the Trigger” for details on how to set the trigger). Because the comparison between the
input signal and the threshold is done in sync with the time base signal, the bus trigger
signal changes in sync with the time base signal and “True” is output during the time the
trigger conditions are satisfied.
Bus trigger signal
(BUSTRG)
Threshold level
400 ns*
Input signal
Time base signal
When the trigger conditions are satisfied when the input signal is above the threshold
TB: Time base time
T
B
* This value is a typical value (not warranted).
The WE7235 can also acquire data by following the bus trigger signal. If the bus trigger
signal becomes “True” between the “False” to “True” edge and the “True” to “False” edge
of the time base signal, then the trigger is considered to have been satisfied by the data
sampled with the time base signal. Note the following when making multiple acquisitions
in the trigger mode: Because the bus trigger signal is detected on the level of the signal,
if the duration in which the bus trigger signal remains “True” is longer than the hold off
period, the next acquisition starts after the hold off period.
Bus trigger signal
(BUSTRG)
If the bus trigger becomes “True” during this period,
trigger is considered to have occurred during this sampling.
Timing at which
the WE7235
detects the
trigger
1st time
2nd time
3rd time
Hold off
Time base signal
T
B
TB: Time base time
In addition, the WE7235 can output a bus trigger signal upon detecting a trigger within
the module, and receive the results of the AND/OR computation on the bus to trigger the
actual trigger operation.
Input/Output of Time Base Signals
While the data acquisition is in progress, the time base signal generated by the internal
clock of the WE7235 can be output to the time base signal bus (CMNCLK) in the
measuring station. The time difference between the internal clock and the time base
signal (CMNCLK) is approximately 100 ns (typical value
*
).
Conversely, the WE7235 can input and synchronize to the time base signal (CMNCLK)
on the bus in order to sample the input signal. If the period of the time base signal is
shorter than the setting range of the sampling interval (see 1.3 “Setting the Conditions for
Acquiring the Waveform”), the time base signal is sometimes ignored and the sampling
does not occur. The delay from the time the time base signal enters the WE7521 to the
time the sampling starts is approximately 80 ns (typical value
*
).
*
The typical value is a representative or standard value. It is not a warranted value.