2-12
SM 701730-01E
2.2.16 EXT Clock Input Test
1.
Enter the following settings two channels at a time.
Display:
ON (other channels OFF)
2.
Enter the following settings on all channels, then perform steps 3, 4, and 5.
CH (all channels)
V/div:
50 mV/div
Probe:
1:1
Coupling:
DC 1 M
Ω
DISPLAY
Format:
Dual
ACQ
Record Length:
10 k
Mode:
Normal
Time Base:
Ext
ENHANCED (Trigger)
Type:
OR
Set Pattern (all channels):
↑
Level (all channels):
0 mV
3.
Input a 20 MHz sinewave to the EXT clock input terminal on the rear panel
through a 50
Ω
terminator.
4.
Input a 300 mV
P-P
, 4 kHz sinewave from the function generator to the channels
under test.
5.
Confirm that no noticeable degradation occurs from bit loss and that the
waveform in the figure below is displayed correctly.
Waveform Observation Example
2.2 Tests for the DL1720E/DL1740E/DL1740EL
Содержание DL1720E
Страница 35: ...3 6 SM 701730 01E Figure 3 3 Observed Waveform 3 4 DC Offset Adjustment on the AD Board...
Страница 68: ...7 18 SM 701730 01E DL with the Input Assy Removed 7 13 Removing the Input Assy...
Страница 70: ...7 20 SM 701730 01E DL with the AD Board Assy Removed 7 14 Removing the AD Board Assy...
