Yamaha WXA-50, Руководство по обслуживанию

Страница: 47 / 76

★
All voltages are measured with a 10MΩ/V DC electronic voltmeter.
★
Components having special characteristics are marked ⚠ and must be replaced
with parts having specifications equal to those originally installed.
★
Schematic diagram is subject to change without notice.
● 電圧は、内部抵抗 10MΩの電圧計で測定したものです。
● ⚠印のある部品は、安全性確保部品を示しています。部品の交換が必要な場合、
パーツリストに記載されている部品を使用してください。
● 本回路図は標準回路図です。改良のため予告なく変更することがあります。
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B C D E F G H I J K L M N O P Q R S T U V W X Y Z A
47
MAIN 1/3
WXA-50/WXC-50
SCHEMATIC DIAGRAMS
14.9
11.6
7.9
9.0
-9.0
5.1
-11.6
L A B E L N A
65
4
14
8
90
11
12
1
7
P
1
6
12
1
3
1
10
M C P U _ N _ R S T
PRT_PS1
D S P _ P O N
BOOT SWCLK SWDIO SWV
THM_MON
PRT_USB_VBUS
S E L _ D A C I N
S E L _ P C M / D S D
M T _ N _ B U S
+ 3 . 3 S _ P O N
D I R _ S C K
D I R _ N _ C S
A O U T _ S E L
D A C _ S D A
D A C _ S C L
D S P _ S C L
D A C _ R S T
D S P _ S D A
S W D I O
S W C L K
S W V
L M T _ P S 1
L M T _ P S 2
2 3 2 C _ D B G _ M I S O
2 3 2 C _ D B G _ M O S I
N C P U _ N _ R S T
NCPU_SPI_MOSI NCPU_SPI_MISO NCPU_SPI_SCK NCPU_MISO NCPU_MOSI
U S B _ V B U S _ P O N
B O O T
LED_NET LED_BT LED_SRC_R LED_SRC_G LED_SRC_B SW_STDBY SW_SOURCE SW_PLAY VOL_RB VOL_RA
D I R _ N _ I N T
D I R _ N _ R S T
S P R Y _ C T R L
A M P _ E N
D S P _ N _ R S T
M T _ N _ P R E
D C _ T R G _ O U T
N C P U _ N _ I N T
S W _ W L _ B T
N C P U _ A M U T E
N C P U _ P O N
MODEL HWDET
MODE
N C P U _ P H O L D
N C P U _ S P I _ N _ C S
N C P U _ V B U S D R V
N C P U _ A D T _ M U T E
REM_IN1
VOL_RA VOL_RB
LED_SRC_B
LED_NET
LED_BT
SW_SOURCE LED_SRC_R
SW_PLAY
LED_SRC_G
SW_STDBY
E E P _ M I S O
E E P _ M O S I E E P _ N _ C S
E E P _ S C K
2 3 2 C _ D B G _ M I S O
S W _ M O D E
R E M _ I N 1
A M P _ B T L
B T L _ S y n c
2 3 2 C _ D B G _ M O S I
S W _ W L _ A L L
A C P W R _ D E T
M C P U _ N _ R S T
M C P U _ N _ R S T
AMP_OLV
D I R _ M O S I
D I R _ M I S O
TEST
P R T _ O C
P R T _ T H M
P R Y _ C T R L
DIAG_UART_MOSI DIAG_UART_MISO
FAN_CTRL FAN_LOCK
PRT_PS2
REM_IN2
DC_TRG_IN
DSP2_N_RST
DSP2_SCL DSP2_SDA
R E M _ I N 2
DIR_N_RST
F A N _ L O C K
P R T _ P S 2
F A N _ C T R L
A M P _ O L V
T H M _ M O N
S W _ W L _ A L L
S W _ W L _ B T
D C _ T R G _ O U T
D C _ T R G _ I N
NCPU_SPI_MISO NCPU_SPI_N_CS DIR_N_CS NCPU_VBUSDRV MT_N_PRE
M T _ N _ B U S
NCPU_SPI_MOSI PRT_USB_VBUS DIR_N_INT DIR_MOSI DIR_MISO
M T _ B U S
AOUT_SEL PRT_THM AMP_EN MT_BUS SEL_DACIN DAC_RST DAC_SCL DAC_SDA DSP_SCL DSP_SDA NCPU_N_INT NCPU_PON
M T _ P R E
BTL_Sync MT_PRE DSP_N_RST DIR_SCK SEL_PCM/DSD DSP2_N_RST USB_VBUS_PON DSP2_SDA DSP2_SCL PRT_OC NCPU_PHOLD NCPU_ADT_MUTE NCPU_MISO +3.3S_PON PRT_PS1 NCPU_MOSI DSP_PON NCPU_AMUTE NCPU_N_RST NCPU_SPI_SCK PRT_PS1 SW_MODE PRY_CTRL
A C P W R _ D E T
M C P U _ N _ R S T
S P R Y _ C T R L
M T _ N _ P R E
D G N D
D G N D
R27 1K
R25 1K
R26
9.1K
D G N D
1 0 K
R 3 3
C 2 6
0 . 1 / 1 0 ( B J )
D G N D
C34
0.1/10(BJ)
R54
100X4
1 2 4
5 7 8
3
6
R58
100X4
1 2 4
5 7 8
3
6
L 1
B K P 1 0 0 5 H S 6 8 0 - T
R61
100X4
1 2 4
5 7 8
3
6
C28
0.1/10(BJ)
+3.3M
+ 3 . 3 M
+ 3 . 3 S
+ 3 . 3 M
D G N D
C 3 2
1 0 / 1 0
R 5 0
1 M
R48
100K
+ 3 . 3 M + 3 . 3 M
R 5 3
1 K
1 K
R 3 6
R17
10K
D G N D
R15
0
R18
+ 3 . 3 S
6.8K
R3
9
D G N D
R14
10K
+ 3 . 3 S + 3 . 3 S
1 K
R 3 5
R40
10K
S
3
.
3
+
S
3
.
3
+
Q 1
H N 4 B 0 1 J E ( T E 8 5 L ,
B 1
E
B 2 C 2
C 1
Q 2
H N 4 B 0 1 J E ( T E 8 5 L ,
B 1
E
B 2 C 2
C 1
D
N
G
D
D
N
G
D
C22
1/25
R 1 9
1 M
+ 3 . 3 M
DGND
0.1/10(BJ)
C 1 5
D G N D
D G N D
C 2 5
0 . 1 / 1 0 ( B J )
C 1
0 . 1 / 1 0 ( B J )
X L 1
1 2 M H Z
1
2
3
1 0 0 0 P ( B )
C 2 7
+ 3 . 3 M
+ 3 . 3 M
DGND
D G N D
D G N D
C 2 4
0 . 1 / 1 0 ( B J )
C8
1/25
D G N D
C 2
0 . 1 / 1 0 ( B J )
D G N D
C10
1/25
C 6
1 / 2 5
+ 3 . 3 M
+ 3 . 3 M
C9
0.1/10(BJ)
C7
0.1/10(BJ)
D G N D
+ 3 . 3 M
R 2 9
3 3 X 4
R 3 4
1 0 0 K
+3.3M
C 3
0 . 1 / 1 0 ( B J )
D G N D
R 3 1
3 3
DGND
+ 3 . 3 M
R 2 8
1 0 K
R 3 7
3 3 X 4
12
4 5
78
3 6
R12
33X4
1 2 4
5 7 8
3
6
R 1 0
3 3
R16
33X4
+3.3M
C5
0.1/10(BJ)
R11
33X4
1 2 4
5 7 8
3
6
DGND
+3.3M
C4
0.1/10(BJ)
DGND
DGND
+3.3M
+3.3M
R60
10K
D G N D
R 6 3
4 7 X 4
12
4 5
78
3 6
R 6 2
4 7 X 4
12
4 5
78
3 6
R57
100KX4
1 2 4
5 7 8
3
6
+ 3 . 3 M
+ 3 . 3 M
D G N D
C39
0.015/16(B)
+ 3 . 3 M
C35
0.1/10(BJ)
C 1 8
1 0 0 0 P ( B )
C 1 7
1 0 0 0 P ( B )
C 2 0
1 0 0 0 P ( B )
R 9
n o _ u s e
I C 1
T M P M 4 6 2 F 1 5 F G ( A D
1 2 3 4 5 6 7 8 9 10 1
1
12 13 14 15 16 17 18 19 20 21 22 23 24 25
8 4
8 3
8 2
8 1
4 5
4 6
4 7
4 8
4 9
5 0
5 1
5 2
5 3
5 4
5 5
5 6
5 7
5 8
5 9
6 0
6 1
6 2
6 3
6 4
6 5
96 97 98 99
100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120
1 3 6
1 3 7
1 3 8
1 3 9
1 4 0
1 4 1
1 4 2
1 4 3
1 4 4
1 4 5
1 4 6
1 4 7
1 4 8
1 4 9
1 5 0
1 5 1
1 5 2
1 5 3
1 5 4
1 5 5
1 5 6
1 5 7
1 5 8
1 5 9
1 6 0
26 27 28 29 30 31
6 6
6 7
6 8
6 9
7 0
7 1
7 2
1 6 1
1 6 2
1 6 3
1 6 4
1 3 3
1 3 4
1 3 5
32
89 90 91 92 93 94 95
33 34 35 36 37 38 39 40
7 3
7 4
7 5
7 6
7 7
7 8
7 9
8 0
121 122 123 124 125 126 127 128
1 6 5
1 6 6
1 6 7
1 6 8
1 6 9
1 7 0
1 7 1
1 7 2
41 42 43 44
8 5
8 6
8 7
8 8 129 130 131 132
1 7 3
1 7 4
1 7 5
1 7 6
R 3 0
3 3
T P 3
C 1 1
1 0 0 0 P ( B )
C 1 3
1 0 0 0 P ( B )
D G N D
D G N D
TP8
+ 3 . 3 S
D G N D
R20
10K
+ 3 . 3 S
R23
10K
R21
no_use
TP6
R 3
1 0 0
R 4
1 0 0
R 2
1 0 0 K
R 5
1 0 0 K
D G N D
D G N D
R 1
3 3 X 4
12
4 57
8
3 6
L 2
B L M 2 1 P G 6 0 0 S N 1 D
C29
0.1/10(BJ)
+5V
C 1 9
1 0 0 0 P ( B )
C 2 1
1 0 0 0 P ( B )
C 1 4
1 0 0 0 P ( B )
C 1 2
1 0 0 0 P ( B )
D G N D
T P 2
1 0 0
R 3 8
C 2 3
1 0 0 0 P ( B )
1 0 0
R 3 2
R67
100
R 8
1 0 0 K
+ 3 . 3 M
IC2
M 9 5 3 2 0 - R M N 6 T P
1
S
2
Q
3
W
4
V S S
5
D
6
C
7
H O L D
8
V C C
Q 3
D T C 0 4 4 E U B T L
+ 3 . 3 M
D G N D
D G N D
R 7
1 0 0 K
R 6
1 0 0 K
D G N D
IC3
V +
5
IC3 V-
3
I C 3
S N 7 4 L V C 1 G 1 7 D C K R
2 4
1 0 0
R 8 4
D 1
1 S S 3 5 5 V M
D3
1SS355VM
D2
1SS355VM
D 5
R B 5 2 1 S - 3 0 T E 6 1
D G N D
IC4
V +
5
IC4 V-
2
I C 4
7 4 L V C 2 G 1 7 G W , 1 2 5
1 6
I C 4
7 4 L V C 2 G 1 7 G W , 1 2 5
3 4
C16
0.1/10(BJ)
D G N D
+ 3 . 3 D S P
R 8 6
1 0 0
R 8 7
1 0 0
TP67 TP66
+3.3M
R22
100K
1K
R88
C58
10/16
D G N D
C59
330P(B)
D G N D
+3.3M
R13
1M
+ 3 . 3 M
R92
100K
R24
no_use
CB1
52045
1 2 3 4 5 6 7 8 9
10 11 12 13 14 15
CB5 PHI
L A 1
W P 4 1 6 5 0
8
D G N D
C 6 1
0 . 1 / 1 0 ( B J )
R 3 1 1 6 N 2 7 1 A - T R - F
IC5
1
O U T
2
V D D
3
G N D
4
N C
5
C D
DGND
C49
22/6.3
+15V
D G N D
DGND
C50
33P(CH)
C 4 7
0 . 1 / 1 6
T P 6 3
+ 5 V
PK501
EPM1510SJ
- D C O U T
N C
+ D C O U T
S e c W
D r a i n
- D C I N
V c c w
F B
+ D C I N
V c c
Q 7
D T C 0 4 4 E U B T L
A G N D _ D A
C38
1/10
R503 10K
+ 7 A
R 5 2 4
3 3 K
C42
0.01(B)
+ 5 V
R 5 2 5
1 8 K
D50
7
1SS355VM
Q 6
C4081UBTLR
R78
100K
R502
1/2P3M
R77
47K
C510
56/400
R 7 4
1 0 0
C 4 0
1 / 1 0
D6
1SS355VM
R 7 3
1 0 0
D 8
1 S S 3 5 5 V M
C37
0.1
C507
2.2/10
R68
100
D10
1SS355VM
C 4 1
1 / 1 0
R519
1K
R66
100K
D 9
1 S S 3 5 5 V M
R69 1M
D 5 0 9
R F 0 8 1 M 2 S T R
D G N D
D4
RB521S-30TE6
1
R516
10
D7
1SS355VM
D G N D
Q 5 0 3
D 2 7 0 4 ( K )
D51
1
RB521S-30TE6
1
- 1 0 V
D506
1SS355V
M
C45
10(X7R)
D 5 1 0
R F 0 8 1 M 2 S T R
+ 3 . 3 M
D G N D
D 5 0 8
R F 0 8 1 M 2 S T R
R505
no_use
C53
1/25
D 5 0 3
1 S S 3 5 5 V M
+15V
I C 8
R P 1 3 0 K 3 3 1 D - T R
4
V D D
3
C E / C E
1
V O U T
2
G N D
G
+3.3M
D G N D
D50
4
RF081M2STR
R64
1M
C 5 0 2
0 . 0 1 / 2 5 0
C54
1/25
D G N D
+ 5 V
D G N D
D G 5 D 1 - O ( M ) - I I
R Y 5 0 1
+ 3 . 3 S
NCPU_MOSI
D 5 0 5
U D Z V 6 . 2 B
R 7 5
1 0 0
+ 1 0 V
TP65
NCPU_MISO
R 7 2
1 0 0
C 5 0 1
0 . 1 / 2 7 5
DSP_PON NCPU_ADT_MUTE
R 7 1
1 0 0
PRT_PS1 NCPU_PHOLD
R 7 0
1 0 0
2 . 2
R 5 1 4
USB_VBUS_PON
R 6 5
1 0 0
SEL_PCM/DSD
R 7 6
1 0
R A L 0 3 5 P 0 1
Q 5 0 2
D1
1
D2
2
G
3
S
4
D5
5
D6
6
DSP_N_RST
C36
100P(CH)
IC502
BD7541G-TR
1 3
4
R 4 9
1 0 0 K
MT_PRE SW_MODE
R43
5.6K
DIR_SCK
D G N D
C43
1/10
D G N D
C44
1/10
C51 1/25
R512
2.7K
+ 3 . 3 M
C46
0.1
C52
1/25
R513
68
C513
no_use
TP64
+ 5 V
C57
10(X7R)
R517 47K
R83
4.7K
D G N D
R 5 1 0
3 . 3 K
R 8 2
1 0 0
R509 22K
C506
0.01(B)
C514 1/25
R44
100K
D11
UDZV3.0B
C518
100/50
D G N D
C60
47/6.3
R515
7.5K
C519
100/50
R45
100K
DGND
NCPU_N_INT
C56
22/6.3
D G N D
R89 3.3K
NCPU_PON
C55
1/10
L 5
B L M 2 1 P G 6 0 0 S N 1 D
C30 1/25
C 5 2 1
n o _ u s e
NCPU_N_RST
R 5 1 1
5 6 0
C48
3300P(B)
C509
4.7/1
6
R 9 1
1 0
C505
no_use
NCPU_SPI_MISO
R81 22K
C508
4.7/16
A 1 5 7 6 U B T L R
Q 4
R 9 0
1 0 0
NCPU_SPI_MOSI
R79
120K
C51
5
220/1
0
NCPU_SPI_SCK
L 5 0 2
1 . 5 U H
R80
3.3K
C520
100/16
4 . 7 K
R 4 6
NCPU_SPI_N_CS
A G N D
I C 7
R P 1 3 0 K 3 3 1 D - T R
4
V D D
3
C E / C E
1
V O U T
2
G N D
G
C51
6
120/1
6
+ 3 . 3 S
R507
1/4P0.22
C51
7
120/1
6
R 5 1
4 7 0
IC502
V - 2
R518 47K
W502A
2 P 1 7 0 M M V H - 5 2 9 8 T
NCPU_AMUTE
W502B
2 P 1 7 0 M M V H - 5 2 9 8 T
DAC_RST DIR_N_RST
F501
1.00A250V
SEL_DACIN PRT_USB_VBUS MT_BUS NCPU_VBUSDRV DIR_N_CS AMP_EN
Q 5 0 5
A 1 0 3 7 A K ( Q / R / S )
CB501 VHIS
PRT_THM AOUT_SEL
T 5 0 1
S H 1 0 6 0 2 B
4 . 7 K
R 4 7
C B 2
P H I
1
2
3
4
5
6
R55
100K
W 1
S A N - P H
3 P 6 0 M M B & C B L
1
2
3
DIR_N_INT
R 5 0 8
2 . 2 K
R 5 2
4 7 0
W 2
1 0 P 1 0 0 M M B & C
1
2
3
4
5
6
7
8
9
1 0
DIR_MOSI
C512
330/25
DIR_MISO
IC502
V + 5
- 9 V
R504
no_use
T H 5 0 1
N T P A D 5 R 1 L D N B 0
A 1 5 7 6 U B T L R
Q 5
C522
no_use
C523
no_use
R 5 0 1
1 / 2 P 3 M
C31
1/25
R506
10K
R 1 1 9 1 H 0 9 0 B - T 1 - F
I C 5 0 1
1
V O U T
2 G N D
3
C E
4
E C O
5
V D D
DAC_SCL DAC_SDA
I C 6
BD9D321EFJ-E2
1
EN
2
FB
3
VREG
4
SS
5
GND
6
SW
7
BOOT
8
VIN
9
F I N
DSP_SCL
Q 5 0 4
C R 5 4 2 P
C62
0.1
DSP_SDA DSP2_SCL PRT_OC
1 0 5 D
A 0 6 B S 2 D
DSP2_SDA
Q 5 0 1
D T C 0 1 4 E U B T L
DSP2_N_RST
+ 9 V
+ 1 5 V
R56
100K
- 9 V
C33
100/16
C511
330/25
D G N D
MT_N_PRE BTL_Sync
L 3
B L M 2 1 P G 6 0 0 S N 1 D
R 5 9
1 0 0
D 5 0 2
1 S S 3 5 5 V M
1 0 5 Y R
I I - ) M ( O - 1 D 5 G D
C B 4
n o _ u s e
C 5 0 4
6 8 0 P / 2 5 0
L 4
3 . 3 U H
L 5 0 3
B L M 2 1 P G 6 0 0 S N 1 D
L 5 0 4
B L M 2 1 P G 6 0 0 S N 1 D
L 5 0 1
s 5 0 1
3 . 0 V
0 . 3 V
E E P R O M
Y D 9 0 2 B 0 : S T M i c r o M 9 5 3 2 0 - R M N 6 T P
S C 1 T X D
D V S S
PF2
D V D D 3
PH11 PJ0
I 2 C 1 S C L
S C 1 R X D
REGIN1
P C 7
P L 5
AIN0 PA6 VREFH
S C 1 S C K
DVSS
P C 1
PM7
P B 8
INTE RVDD3 PH14
S C 0 R X D
INT2 PM10
D V S S
PH9 PN4 RXIN1
D V D D 3
TB1OUT
D V S S
PF1
D V S S
DVDD3 RVSS PH13
P E 8
P N 1
TB7IN0
P L 6
DVSS
P B 9
AVSS PA0 AIN4
P G 0
R E S E T
SWCLK
DVSS
B O O T
P C 6
PH12 REGIN2 INTD
SC8RXD
S C 6 R X D
D V S S
DVDD3
P C 2
P K 1
I2C2SDA PA3 PA2
SC8SCK
T B 9 I N 0
P F 9
SWDIO
REGOUT1
P L 7
P C 9
I2C2SCL REGOUT2 AIN5
SC8TXD
P G 2
P F 1 0
T B 6 I N 0
P K 2
P C 0
PA5 DVSS
INT1
P G 3
P F 1 1
PM8
P K 0
REGOUT3
SC9RXD PA1
X1
P N 0
I N T 8
P E 7
DVDD3
D V D D 3
P K 3
PD0
P C 3
PH10 AIN6
PD13
N M I
P F 1 3
M O D E
RVDD3
I N T B
P F 1
TB0OUT
T E S T
PL2 AIN2
P E 5
D V D D 3
X T 1
PD12
P B 0
PM9
P K 7
AIN1 PJ1
CS3
S C 6 T X D
I N T A
A V D D 3
PD1
D V D D 3
P F 2
RVSS
S C 7 R X D
PJ4 PA4
INT0
X T 2
P G 1
P M 1 1
X2
P C 1 1
P K 6
PD11
PL4 AIN7
S C 6 S C K
P E 6
PD2
S C 7 T X D
P M 2
SWV
AIN3 AIN8
P G 1 1
S C 0 T X D
PD14
P C 5
PD15
SC9TXD PA7
B l a n k :
W r i t t e n :
R E S E T
+ 3 . 3 M
to ICE & Flash Programmer
S W D I O
R X D
S W C L K
T X D
S W V
B O O T
R e s e t D e l a y 7 0 m s e c
P G 1 0
P G 9
P G 8
I 2 C 1 S D A
I 2 C 0 S C L
I 2 C 0 S D A
HWDET
Y H 7 0 5 * 0
Y C 4 0 8 B 0 : R e n e s a s R 1 E X 2 5 0 3 2 A S A 0 0 I
Y H 1 2 8 A 0 T M P M 4 6 2 F 1 5 F G ( A D B B )
P B 7
P B 1
P B 4
P B 5
P B 2
P B 6
P B 3
P C 4
PM6
DGND +3.3M +5V SW_STDBY SW_PLAY SW_SORCE LED_SRC_G LED_SRC_R LED_SRC_B REM_IN1 VOL_RA LED_NET LED_BT VOL_RB
D I A G _ C H E C K
+ 3 . 3 M S _ P O N
MODE
TB2OUT TB3OUT TB4OUT
PRT_PS2 PRT_PS1 AMP_OLV
TB5OUT
-
M A I N ( 3 )
D I A G _ U A R T
D C _ T R G _ O U T
S W _ W L _ A L L
R E M _ I N 2
S W _ W L _ B T
T H M _ M O N
D G N D
+ 3 . 3 M
A C _ P W R
+ 1 5 V
D C _ T R G _ I N
B u s O u t
P r e o u t
+ 1 5 V
D G N D
S P R Y _ C T R L
S E C O N D A R Y
P R I M A R Y
V d a u x
G N D
V s a u x
2 A
A M P _ O L V
F A N _ C T R L
F A N _ L O C K
BE WH
D i g i t a l 2 / 2
M A I N ( 2 )
MAIN(5)
MAIN(2)
P O W E R
A M P W X A o n l y
( N C )
( N C )
POWER AMP
W X A o n l y
W X A o n l y
W X A o n l y
5 0 1 - 6 0 0
M A I N ( 1 )
A C D C
M A I N ( 1 )
D i g i t a l 1 / 2
1 - 2 0 0
D e s t i n a t i o n P a r t L i s t
+ - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - +
| s x x | L O C A T I O N | J | U C | T | K | A | B G | L | V S |
+ - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - +
| s 5 0 1 | L 5 0 1 | W K 5 8 6 3 0 | W K 5 8 6 3 0 | Z V 9 4 0 6 0 | Z V 9 4 0 6 0 | Z V 9 4 0 6 0 | Z V 9 4 0 6 0 | Z V 9 4 0 6 0 | W K 5 8 6 3 0 |
| | | 1 3 M H | 1 3 M H | 6 0 M H | 6 0 M H | 6 0 M H | 6 0 M H | 6 0 M H | 1 3 M H |
+ - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - +
1
2
3
4
6
7
8
9
1 0
R E S I S T O R
R E M A R K S
N O M A R K
P A R T S N A M E
C A R B O N
C A R B O N
M E T A L
M E T A L
M E T A L
F I R E
C E M E N T
S E M I
F I L M R E S I S T O R
F I L M R E S I S T O R
O X I D E F I L M R E S I S T O R
F I L M R E S I S T O R
P L A T E R E S I S T O R
P R O O F C A R B O N F I L M R E S I S T O R
M O L D E D R E S I S T O R
V A R I A B L E R E S I S T O R
( P = 5 )
( P = 1 0 )
C H I P R E S I S T O R
N O T I C E
U . S . A
G
C A N A D A
E U R O P E A N S T A N D A R D
L
C H I N A
A U S T R A L I A
S I N G A P O R E
K O R E A
G E N E R A L
U
C
T
A
K
R
J A P A N
( m o d e l )
B B R I T I S H
J
S O U T H E U R O P E E
V T A I W A N
F R U S S I A N
P L A T I N A M E R I C A
S B R A Z I L
H T H A I
R E M A R K S
C A P A C I T O R
P A R T S N A M E
N O
N O
M A R K
M A R K
E L E C T R O L Y T I C C A P A C I T O R
C E R A M I C C A P A C I T O R
P O L Y E S T E R F I L M C A P A C I T O R
P O L Y S T Y R E N E F I L M C A P A C I T O R
M I C A C A P A C I T O R
P O L Y P R O P Y L E N E F I L M C A P A C I T O R
S E M I C O N D U C T I V E C E R A M I C C A P A C I T O R
P
S O L I D E L E C T R O L Y T I C C A P A C I T O R
T U B U L A R
S
C A P A C I T O R C E R A M I C
F I L M S U L F I D E P O L Y P H E N Y L E N E
C A P A C I T O R
IC3 : SN74LVC1G17DCKR
Single schmitt-trigger buffer
1
2
3
5
4
NC
A
GND
VCC
Y
INPUT
A
OUTPUT
Y
L
H
L
H
IC5 : R3116N271A-TR-F
Voltage detector ICs
V
DD
C
D
1
2
3
5
Vref
OUT
GND
Delay
Circuit
IC2 : M95320-RMN6TP
32 K-bit serial SPI bus EEPROM with high speed clock
7
3
1
6
5
2
IC4 : 74LVC2G17GW
Dual non-inverting schmitt trigger with 5 V tolerant input
1A 1Y
2A 2Y
1Y 1A
GND
2Y 2A
1
2
3
6
VCC 5
4
IC1 : TMPM462F15FG (ADBB)
CMOS 32-bit Microprocessor
RTC
LVD
RMC
CEC
SIO/UART
AHB to IO
Bridge
RAM
192KB
FLASH
1.5MB
or
1.0MB
WDT
AHB Lite (max 120MHz)
Cortex-M4F
NVIC
Debug
TMRB
(16ch)
(6ch)
(2ch)
MPT
IO Bus
PORT
OFD
CG
IHOSC
Backup
RAM
1KB
BOOT
ROM
4KB
μDMA
(unit A,B,C)
IHOSC
EHOSC
X1
X2
XT1
XT2
ELOSC
UART
I2C
SSP
ADC
EBIF
AHB to APB
Bridge
(20ch)
(3ch)
(2ch)
(5ch)
APB
IC6 : BD9D321EFJ-E2
4.5V to 18V Input, 3.0A Integrated MOSFET
1ch synchronous buck DC/DC converter
Thermal
Protection
EN
UVLO
TSD
Soft
Start
REF
SS
UVLO
OCP
TSD
On Time
Controller
Block
R
S
Q
BG
5V REG
VIN
VREG
EN
Driver
Circuit
OCP
SW
UVLO
5
GND
SW
VOUT
VIN
7
BOOT
VIN
3
VREG
4
SS
FB
2
VOUT
BG
EN Logic
EN
1
8
6
TSD
VREG
3
ZERO
IC7, 8 : RP130K331D-TR
CMOS-based positive voltage regulator
V
DD
CE
Vref
4 1
3 2
Current Limit
V
OUT
GND
Pin No.
1
2
3
4
Symbol
V
OUT
GND
CE
V
DD
Description
Output Pin
Ground Pin
Chip Enable
Input Pin
IC501 : R1191H090B-T1-FE
Voltage regulator
V
DD
CE
Pin No.
1
2
3
5
Symbol
V
OUT
GND
CE
V
DD
Description
Output Pin
Ground Pin
Chip Enable Pin ("H" Active)
4 ECO Low Power / Fast Mode Changer Pin
Input Pin
Vref
Thermal Protection
5 1
3 2
Short
Protection Reverse
Detector
V
OUT
GND
4
ECO
Peak
Current
Protection
IC502 : BD7541G-TR
Input/output full swing CMOS operational amplifier
–
+
1 5
4
2
3
OUT
VDD
IN-
IN+
VSS
Details of colored lines
Red / full line: Power supply (+)
Red /dashed line: Power supply (-)
Orange: Signal
detect
Yellow: Clock
Green: Protection
detect
Brown: Reset signal
Blue: Panel key input
to MAIN 2/3
MAIN (1)
MAIN (1)
(For factory)
MICROPROCESSOR
EEPROM
No replacement part available.
サービス部品供給なし
5 k-ohms
10 W
5 k-ohms
10 W
5 k-ohms
10 W
to MAIN (2)_CB603
Page 49 F2
to MAIN (5)_W902
Page 49 S13
to MAIN (3)_CB701
Page 49 K9
to MAIN (2)_CB601, 602
DC-DC converter
Page 49 K2
to Amplifier and power module_P100
Page 49 K16
to Amplifier and power module_P103
Page 49 K16
注意 )
安全対策
・ この製品の内部には高電圧部分があり危険です。修理の際は、絶縁性の手袋を使用するなどの安全対策を行ってください。
・ 下記のコンデンサには電源を OFF にした後も電荷が残り、高電圧が維持されており危険です。修理作業前に放電用抵抗（5 kΩ/10 W）
を
下記の各コンデンサの端子間に接続して放電してください。放電所用時間は各々約 30 秒間です。
MAIN
（
1
）
P.C.B.
の
C510
〜
512
Notes)
Safety measures
• Some internal parts in this product contain high voltages and are dangerous. Be sure to take safety measures during servicing, such as wearing insulating gloves.
• Note that the capacitors indicated below are dangerous even after the power is turned off because an electric charge remains and a high voltage continues to exist there.
Before starting any repair work, connect a discharging resistor (5 k-ohms/10 W) to the terminals of each capacitor indicated below to discharge electricity.
The time required for discharging is about 30 seconds per each.
C510–512 on MAIN (1) P.C.B.
WXA-50