VS-10/NX-SW10
VDD2
SDWCK0
SDBCK0
SDIA0
SDIA1
RAMA1
RAMA0
RAMWEN
RAMOEN
VSS
VDD2
IPORT7
IPORT6
IPORT5
IPORT4
IPORT3
IPORT2
IPORT1
IPORT0
VSS
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
VSS
SDWCK1
SDBCK1
SDOB0
SDOB1
SDOB2
RAMA7
RAMA8
RAMA9
VDD2
VSS
OPORT7
OPORT6
OPORT5
OPORT4
OPORT3
OPORT2
OPORT1
OPORT0
VDD1
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
VDD1
RAMCEN
RAMA16
RAMA15
SDIB0
SDIB1
SDIB2
XI
XO
VSS
A
VDD
SDIB3
TEST
TEST
O
VFB
DTSD
A
T
A
A
C3D
A
T
A
SDOB3
CPO
A
VSS
VDD2
SDO
A2
SDO
A1
SDO
A0
RAMA14
RAMA13
RAMA12
RAMA11
RAMA10
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
VSS
RAMD7
RAMD6
RAMD5
RAMD4
RAMD3
RAMD2
RAMD1
RAMD0
VDD1
RAMA2
SCK
SI
SO
/CS
/CSB
RAMA3
TEST
/IC
RAMA4
VSS
RAMA5
RAMA6
/SDBCK0
SURENC
KARA
OKE
MUTE
CRC
NONPCM
VDD2
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
MICROPROCESSOR
INTERFACE
EXTERNAL
RAM
INTERFACE
DATA
RAM
CONTROL REGISTER
CONTROL
SIGNALS
CONTROL
SIGNALS
L, R
LS, RS
C, LFE
STREAM0~7
SDIBCKSEL
SDOACKSEL
SDOBCKSEL
ERAMUSE
SDIASEL
SDIBSEL
SDO
A0
SDO
A1
SDO
A2
SDIB0
SDIB1
SDIB2
SDIB3
IPOR
T0~7
/CS
SO
SI
SCK
OPOR
T0~7
/CSB
RAMCEN
RAMWEN
RAMOEN
RAMA0~16
O
VFB
SDOB0
SDOB1
SDOB2
SDOB3
SURENC
KARAOKE
MUTE
CRC
AC3DATA
DTSDATA
NONPCM
/SDBCK0
SDBCK0
SDWCK0
SDIA0
SDIA1
SDBCK1
SDWCK1
RAMD0~7
XI
XO
CPO
SDIA INTERF
A
C
E
CRC
SDO
A INTERF
A
C
E
SDIB INTERF
A
C
E
SDOB INTERF
A
C
E
INPUT B
UFFER
MAIN DSP
A
C-3/PR
OLOGIC/DTS
DECODER
SUB DSP
DELAY
RAM
PLL
OPERATING
CLOCK (30MHz)
COEFFICIENT
PROGRAM
RAM
SI
SCK
23
IC4 : YSS918D-F
AC3D2av