SP2060
22
Pin
no.
Name
I/O
Function
Pin
no.
Name
I/O
Function
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
MDIO
MDC
RXD3/PHYAD
RXD2/PHYAD2
RXD1/PHYAD3
RXD0/PHYAD4
VDDIO
GND
RXDV/CRSDV/PCS_LPBK
RXC
RXER/ISO
GND
VDDC
TXER
TXC/REFCLK
TXEN
TXD0
TXD1
TXD2
TXD3
COL/RMII
CRS/RMII_BTB
GND
VDDIO
I/O
I
Ipd/O
Ipd/O
Ipd/O
Ipd/O
Pwr
GND
Ipd/O
O
Ipd/O
GND
Pwr
Ipd
I/O
Ipd
Ipd
Ipd
Ipd
Ipd
Ipd/O
Ipd/O
GND
Pwr
Management Independent Interface (MII)
Data I/O.
MII Clock Input.
MII Receiver Data Output.
Digital IO 2.5/3.3V tolerant power supply.
Ground.
MII Receiver Data Valid Output.
MII Receiver Clock Output. Operating at
25MHz=100Mbps, 2.5MHz=10Mbps.
MII Receiver Error Output.
Ground.
Digital core 2.5V only power supply.
MII Transmit Error Input.
MII Transmit Clock Output.
MII Transmit Enable Input.
MII Transmit Data Input.
MII Collision Detect Output.
MII Carrier Sense Output.
Ground.
Digital IO 2.5/3.3V tolerant power supply.
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
INT#/PHYAD0
LED0/TEST
LED1/SPD100/noFEF
LED2/
LED3/NWAYEN
PD#
VDDRX
RX-
RX+
FXSD/FXEN
GND
GND
REXT
VDDRCV
GND
TX-
TX+
VDDTX
GND
GND
XO
XI
VDDPLL
RST#
Ipd/O
Ipd/O
Ipd/O
Ipd/O
Ipd/O
Ipd
Pwr
I
I
Ipd/O
GND
GND
I
Pwr
GND
O
O
Pwr
GND
GND
O
I
Pwr
Ipu
Management Interface (MII) Interrupt Out.
Link/Activity LED Output.
Speed LED Output.
Full-duplex LED Output.
Collision LED Output.
Power Down. 1=Normal operation, 0=Power-
down, Active low.
Analog 2.5V power supply.
Receive Input: Differential receive input pins
for 100FX, 100BaseTX, or 10BaseT.
Fiber Mode Enable/Signal Detect in Fiber
Mode.
Ground.
External resistor (6.49 k
Ω
) connects to
REXT and GND.
Analog 2.5V power supply.
Ground.
Transmit Outputs: Differential transmit out-
put for 100FX, 100BaseTX, or 10BaseT.
Transmit Outputs: Differential transmit out-
put for 100FX, 100BaseTX, or 10BaseT.
Transmitter 2.5V power supply.
Ground.
XTAL feedback: Used with XI for Xtal appli-
cation.
Crystal Oscillator Input: Input for a crystal
or an external 25 MHz clock.
Analog PLL 2.5V power supply.
Chip Reset. Active low, minimum of 50
µ
s
pulse is required.
•
KSZ872ISL
(X5621A00)
PHYceiver
ENT: IC109
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
TDI
A5
A6
A7
GND0
VCCO0
A8
A9
A10
A11
TCK
VCC
GND
A12
A13
A14
A15
CLK1/I
CLK2/I
B0
B1
B2
B3
B4
Test data in
Input/Output
Ground
Power 3.3 V
Input/Output
Test clock input
Power 3.3 V
Ground
Input/Output
CLK input/Input
Input/Output
I
I/O
I/O
I/O
-
-
I/O
I/O
I/O
I/O
I
-
-
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
PIN
No.
NAME
FUNCTION
I/O
PIN
No.
NAME
I/O
FUNCTION
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
TMS
B5
B6
B7
GND1
VCCO1
B8
B9
B10
B11
TDO
VCC
GND
B12
B13
B14
B15/GOE1
CLK3/I
CLK0/I
A0/GOE0
A1
A2
A3
A4
I
I/O
I/O
I/O
-
-
I/O
I/O
I/O
I/O
O
-
-
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Test mode select
Input/Output
Ground
Power 3.3 V
Input/Output
Test data out
Power 3.3 V
Ground
Input/Output
Input/Output / Global output enable input
CLK input/Input
Input/Output / Global output enable input
Input/Output
•
LC4032V-75TN48C
(X7109A00)
CPLD
(Complex Programmable Logic Device)
CPU: IC014
Содержание SP2060
Страница 7: ...SP2060 7 DIMENSIONS 寸法図 361 354 3 4 1 44 440 480 Unit mm 単位 mm ...
Страница 9: ...SP2060 9 CIRCUIT BOARD LAYOUT ユニットレイアウト LCD MODULE PN DC CPU DSP ANA ENT POWER SUPPLY UNIT PS ...
Страница 29: ...SP2060 29 Pattern side パターン側 2NA WG30400 ANA Circuit Board ...
Страница 30: ...SP2060 30 to DSP CN001 CPU Circuit Board 2NA WG30150 Component side 部品側 Pattern side パターン側 ...
Страница 31: ...SP2060 31 to DSP CN300 Not used NETWORK ENT Circuit Board 2NA WG30200 Component side 部品側 Pattern side パターン側 ...
Страница 33: ...SP2060 33 2NA WG30170 DSP Circuit Board Pattern side パターン側 ...
Страница 35: ...SP2060 35 B B B B DC Circuit Board 2NA WG30340 Pattern side パターン側 ...
Страница 106: ...SP2060 SP2060 5 SP2060 B A C D E F G H 2 1 3 4 5 28CA1 2001002768 ANA See page 3 BLOCK DIAGRAM ブロックダイアグラム 3 3 ...
Страница 123: ......