Yamaha S5770, Руководство по обслуживанию

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DVD-S1500/DV-S5770
23
■
SCHEMATIC DIAGRAM
The first digit of a component indicates the component type.
1xxx : Connector 3xxx : Resistor 5xxx : Coil 7xxx : IC, Transistor, FET
2xxx : Capacitor 4xxx : SMD jumper 6xxx : Diode 9xxx : Wire jumper
FOR INFORMATION ONLY (NO SERVICE PARTS WILL BE AVAILABLE)
* Components having special char-
acteristics are marked
Z
and must
be replaced with parts having speci-
fications equal to those originally
installed.
* Schematic diagram is subject to
change without notice.
VSSQ VSS
LATCH
REFRESH COUNTER
BANK0
ROW-
ADDR
LATCH &
DECODER
COLUMN
DEDCODER
BANK0
MEMORY
ARRAY
(4,096x256x16)
SENSE AMPLIFIERS
COMMAND
DECODE
CTRL
LOGIC
MODE REG
ADDRESS REGISTER
ROW
ADDR
MUX
LOGIC
CTRL
NC
VDD
DQM0...3
VDDQ
DATA INPUT REGISTER
DATA OUTPUT REGISTER
READ DATA LATCH
WRITE DRIVERS
I/O GATING
DQM DATA LOGIC
ADDR
COUNTER/
BANK
COLUMN
P1,P2
P2
P1,P2
P2
P2
P1
P2
P2
P2
P2
P2
P2
P2
P2
P1
P1
P1
P1
P1
P1
P2
P2
P2
P2
P2
P2
P1
P1
P1
P1
P1
P1
P1
P1
P1
P2,P4
P2,P4
P2,P4
P2
P2
P2
P2
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P2
#
3192 D1
3196 E9
5100 A13
7100 C3
7101 C12
7103 A12
7121 G11
7122 H11
F100 A12
F101 A13
F102 A13
F103 A13
F106 B8
F107 B8
F108 B8
AV3
II0
3177 G8
3180 D9
3181 D9
3182 D9
3183 F8
3184 E9
3185 E9
3186 E9
3187 E9
3188 E9
3189 E9
3190 D2
3191 D2
3197 E9
3198 F9
3199 F9
4100 F1
4101 F1
5101 A13
5102 A13
3163 E11
3164 D11
3165 D9
3166 D9
3167 G10
3171 H10
VDC vtg measured in STOP-MODE
DECOUPLING CAP FOR FLI2301/ FLI2310
3178 G8
3179 D9
DECOUPLING CAP FOR FLI2301 / FLI2310
2147 C13
2148 B10
2155 B13
3103 C2
2131 B12
2132 B12
3155 D9
3158 I7
3159 I7
3160 D11
3161 D11
3162 E11
3141 I6
3142 I6
3143 I6
3144 I6
3145 I6
3146 I6
3147 I7
3111 G1
3112 I3
3113 I3
3114 I3
3115 I4
3116 I3
3117 I3
3148 I6
3149 I6
3150 C7
3151 G1
3152 C4
3154 D9
3126 I5
3156 D9
3157 D9
3129 I4
3130 I5
3131 I5
3132 I5
3133 I5
3134 I5
3135 I5
3136 I5
3137 I5
3138 I5
3139 I5
3140 I7
3107 G1
3108 G1
3109 G1
3110 G1
3118 I4
3119 I3
3120 I4
3121 I4
3122 I4
3123 I4
3124 I4
3125 I4
3127 I4
3128 I5
2135 B10
2136 B9
2137 B9
2138 A9
2139 B9
2140 B13
2141 B13
2142 C14
2143 C13
2144 C13
2145 C12
2146 C12
2117 B8
2118 A5
2149 B10
2150 F9
2151 C6
2153 G2
DECOUPLING CAP FOR FLI2301 / FLI2310
2119 A6
2120 B8
2121 B8
2122 A8
2123 A8
2124 A8
2125 A8
2126 A9
2127 A9
2128 A9
2130 B12
B
C
AP1
2133 B13
2134 B10
2107 B14
2109 B5
2110 A7
2111 A6
2112 A6
2113 B8
2114 A5
2115 A5
2116 A6
5 6
1 4 5 6 7 8 9 10 11 12 13 14
A
1 2 3 4
2103 A14
7 8 9 10 11 12 13 14
2 3
2101 A5
A
2102 A13
B
C
D
E
F
G
H
I
2100 A14
P2
AZ1
D
E
F
G
H
I
F107
220n
F106
2140
2142 2143 220n
220n
22R
3139 3149 3116
22R
3125
22R 22R
22R
22R 3163
86 6 12 32 38 46 52 78 84
WE_ 17
3161
15 29 43 3 9 35 41 49 55 75 81
44 58 72
11
DQ7 13
DQ8 74
DQ9 76
16 DQM0
71 DQM1
28 DQM2
59 DQM3
14
21
30
57
69
70
73
RAS_ 19
1
5
DQ20 37
DQ21 39
DQ22 40
DQ23 42
DQ24 45
DQ25 47
DQ26 48
50 DQ27
DQ28 51
53 DQ29
DQ3 7
DQ30 54
DQ31 56
DQ4 8
DQ5 10
DQ6
18
CKE 67
CLK 68
CS_ 20
DQ0 2
DQ1 4
DQ10 77
DQ11 79
80 DQ12
DQ13 82
83 DQ14
DQ15 85
DQ16 31
DQ17 33
DQ18 34
DQ19 36
DQ2
A0 25
A1 26
A10 24
A2 27
A3 60
61 A4
A5 62
63 A6
A7 64
A8 65
A9 66
BA0 22
BA1 23
CAS_
47u
MT48LC2M32B2TG
7101
2107
47u
2103
3192
10K
100n 2137
F108
BSN20
7122
7121
BSN20
3157 47R
47R 3156
47R 3155
2141 220n 220n 2131
2145 220n
2130 220n 2133 220n 2132
22R 3162
220n
22R 3160
22R
3115
22R
3117 3130
22R
3131
22R 22R
3132
3154 47R
220n 220n 2146 2144 2147 220n
2119 100n 2112
100n
100n
2113 100n 2117
10K 3191 3190 10K
DAC
3146
47R 3188
3141
22R 22R
3142
22R
3148
4K7
22R
3150
3112 3133
22R 22R
3134
22R
22R
3140
22R
3147
3152
22R
100p 2153
3151 22R
VSS7
129
VSS8
147
VSS9
194
VSScore1
17
VSScore2
37
VSScore3
69
VSScore4
81
VSScore5
97
VSScore6
124
VSScore7
139
VSScore8
198
VSYNC1_PORT1
2
VSYNC2_PORT1
6
VSYNC_PORT2
207
XTAL_IN
191
XTAL_OUT
192
146
VDD8
VDD9
193
VDDcore1
16
VDDcore2
36
VDDcore3
68
VDDcore4
80
VDDcore5
96
VDDcore6
123
VDDcore7
138
VDDcore8
197
VSS1
9
VSS2
31
VSS3
49
VSS4
63
VSS5
89
VSS6
113
104
TEST
42
TEST0
188
TEST1
189
TEST2
190
TEST3
115
TEST_IN
90
TEST_OUT0
116
TEST_OUT1
117
VDD1
8
VDD2
30
VDD3
48
VDD4
62
VDD5
88
VDD6
112
VDD7
128
79
SDRAM_DATA_26
82
SDRAM_DATA_27
83
SDRAM_DATA_28
84
SDRAM_DATA_29
85
SDRAM_DATA_3
53
SDRAM_DATA_30
86
SDRAM_DATA_31
87
SDRAM_DATA_4
54
SDRAM_DATA_5
55
SDRAM_DATA_6
56
SDRAM_DATA_7
57
SDRAM_DATA_8
58
SDRAM_DATA_9
59
SDRAM_DQM
110
SDRAM_RASN
105
SDRAM_WEN
60
SDRAM_DATA_11
61
SDRAM_DATA_12
64
SDRAM_DATA_13
65
SDRAM_DATA_14
66
SDRAM_DATA_15
67
SDRAM_DATA_16
70
SDRAM_DATA_17
71
SDRAM_DATA_18
72
SDRAM_DATA_19
73
SDRAM_DATA_2
52
SDRAM_DATA_20
74
SDRAM_DATA_21
75
SDRAM_DATA_22
76
SDRAM_DATA_23
77
SDRAM_DATA_24
78
SDRAM_DATA_25
101
SDRAM_ADDR_3
100
SDRAM_ADDR_4
99
SDRAM_ADDR_5
98
SDRAM_ADDR_6
95
SDRAM_ADDR_7
94
SDRAM_ADDR_8
93
SDRAM_ADDR_9
92
SDRAM_BA0
108
SDRAM_BA1
107
SDRAM_CASN
106
114
SDRAM_CLKIN
SDRAM_CLKOUT
111
SDRAM_CSN
109
SDRAM_DATA_0
50
SDRAM_DATA_1
51
SDRAM_DATA_10
27
R|Cr|CbCr_7
28
R|Cr|Cb|Cr_3
24
R|V|PR_OUT_0
136
R|V|PR_OUT_1
137
R|V|PR_OUT_2
140
R|V|PR_OUT_3
141
R|V|PR_OUT_4
142
R|V|PR_OUT_5
143
R|V|PR_OUT_6
144
R|V|PR_OUT_7
145
SCLK
45
SDATA
46
SDRAM_ADDR_0
103
SDRAM_ADDR_1
102
SDRAM_ADDR_10
91
SDRAM_ADDR_2
1
HSYNC2_PORT1
5
HSYNC_PORT2
208
IN_CLK1_PORT1
4
IN_CLK2_PORT1
10
IN_SEL
41
OE
156 PLL_PVDD
157
PLL_PVSS
158
RESET_N
47
R|Cr|CbCr_0
21
R|Cr|CbCr_1
22
R|Cr|CbCr_2
23
R|Cr|CbCr_4
25
R|Cr|CbCr_5
26
R|Cr|CbCr_6
29
G|Y|Y_1
32
G|Y|Y_2
33
G|Y|Y_3
34
G|Y|Y_4
35
G|Y|Y_5
38
G|Y|Y_6
39
G|Y|Y_7
40
G|Y|Y_OUT_0
148
G|Y|Y_OUT_1
149
150
G|Y|Y_OUT_2
G|Y|Y_OUT_3
151
G|Y|Y_OUT_4
152
G|Y|Y_OUT_5
153
G|Y|Y_OUT_6
154
G|Y|Y_OUT_7
155
HSYNC1_PORT1
186
DAC_GR_AVSS
185
DAC_G_OUT
173
DAC_PVDD
187
DAC_PVSS
167
DAC_RSET
180
DAC_R_OUT
176
DAC_VDD
168
DAC_VREFIN
182
DAC_VREFOUT
181 169
DAC_VSS
DEV_ADDR0
44
DEV_ADDR1
43
FIELD_ID1_PORT1
3
FIELD_ID2_PORT1
7
FIELD_ID_PORT2
206
G|Y|Y_0
200
D1_IN_3
201
D1_IN_4
202
D1_IN_5
203
D1_IN_6
204
D1_IN_7
205
DAC_AVDD
183
DAC_AVDDB
171
DAC_AVDDG
174
DAC_AVDDR
177 184
DAC_AVSS
DAC_AVSSB
172
DAC_AVSSG
175
DAC_AVSSR
178
DAC_B_OUT
170
DAC_COMP
179
DAC_GR_AVDD
127
B|U|Pb_OUT_2
130
B|U|Pb_OUT_3
131
B|U|Pb_OUT_4
132
B|U|Pb_OUT_5
133
B|U|Pb_OUT_6
134
B|U|Pb_OUT_7
135
CLKOUT
125
CLK_PORT2
195
CTLOUT0
118
CTLOUT1
119
CTLOUT2
120
CTLOUT3
121
CTLOUT4
122
D1_IN_0
196
D1_IN_1
199
D1_IN_2
164
AVDD_PLL_BE1
160
AVDD_PLL_BE2
161
AVSSPLL_FE
166
AVSSPLL_SDI
163
AVSS_PLL_BE1
159
AVSS_PLL_BE2
162
B|Cb|D1_0
11
B|Cb|D1_1
12
B|Cb|D1_2
13
B|Cb|D1_3
14
B|Cb|D1_4
15
B|Cb|D1_5
18
B|Cb|D1_6
19
B|Cb|D1_7
20
B|U|Pb_OUT_0
126
B|U|Pb_OUT_1
FLI2310
7100
AVDDPLL_FE
165
AVDDPLL_SDI
3178 22R
2151
100n
47R 3166
DAC
PLL
100n 2114 100n 2118
3109 22R
22R
3126
IN OUT
2101 100n
LF18ABT
7103
GND
F101
5101
5102
4100
3183
47R
10p
2150
100n 2122
3136
22R
100n 2123
22R
3124
2100
3118
22R
47u
3144
22R
3143
22R
22R
3120
100n 2138
3181 47R
3199 47R
2111 100n
4K7
3167
3165 47R
22R
3123
3108
100R 3107
22R
3129
100R
3103
22R
2134 100n 100n 2135
3135
100n 2136
22R
5100
2120 100n
PLL
F102
F103
2148 100n
47R 3184
47R 3182
100n 2115
22R 3164
2116 100n
2139 100n
3171 4K7
47R 3197
3196 47R
22R
3122
4101
2124 100n
+3V3D_V
47R 3179
3180
47R
3198
22R
3159
47R
3189 47R
22R 22R
3127 3121
2125 100n
+3V3D_V
3185 47R
3145
22R
3110 22R
2109 100n
22R
3114
2155
10u
16V
22R
3104
3119
22R
22R 3177
PLL
3113
100n 2110
3138
22R 22R
F100
3111 22R
100n 2121
100n 2128
22R
3158
100n 2149
47R 3187
3186 47R
22R
3128
2102
220n
2127 100n
22R
3137
2126 100n
DATA(17)
DATA(18)
DATA(19)
DATA(20)
DATA(21)
DATA(22)
DATA(23)
DATA(24)
DATA(25)
DATA(26)
DATA(27)
DATA(28)
DATA(29)
DATA(30)
DATA(31)
SRAM_DQM
ADD(9)
ADD(8)
ADD(7)
ADD(6)
ADD(5)
ADD(4)
ADD(3)
ADD(2)
ADD(10)
ADD(1)
ADD(0)
+3V3_MEM
+3V3_MEM
DATA(0)
DATA(1)
DATA(2)
DATA(3)
DATA(4)
DATA(5)
DATA(6)
DATA(7)
DATA(8)
DATA(9)
DATA(10)
DATA(11)
DATA(12)
DATA(13)
DATA(14)
DATA(15)
DATA(16)
YB(0) YB(1)
+1V8_PLL
WEN
SRAM_DQM
CSN
+1V8_CORE
+3V3_D
SCL_5V
YB(4)
YB(5)
YB(0)
YB(3)
YB(2)
RASN
CSN
CLK
WEN
CASN
BA1
BA0
DATA(6) DATA(7) DATA(8) DATA(9)
DATA(0)
DATA(1)
DATA(2)
DATA(3) DATA(4)
YB(6)
YB(1)
+1V8_CORE
+1V8_CORE
+1V8_CORE
+1V8_CORE
+3V3_D
+3V3_D
+3V3_D
RASN
CASN
BA0
BA1
YB(7) YB(2) YB(3) YB(4) YB(5) YB(6)
ADD(4) ADD(3) ADD(2) ADD(1) ADD(10) ADD(9) ADD(8) ADD(7) ADD(6) DATA(28) DATA(29) DATA(30) DATA(31) DATA(23) DATA(24) DATA(25) DATA(26) DATA(27) DATA(19) DATA(20) DATA(21) DATA(22) DATA(14) DATA(15) DATA(16) DATA(17) DATA(18) DATA(10) DATA(11) DATA(12) DATA(13) DATA(5)
DAC_R
HSYNC
VSYNC
27M_CLK
+3V3_D
27M_CLK
P_HSYNC
P_VSYNC
+3V3_DAC
+3V3_D
SCL_3V3
SDA_3V3
+3V3_D
P_CLK
+3V3_DAC +1V8_PLL
+3V3_D
ADD(0) ADD(5)
CLK
CLK
+1V8_PLL
+1V8_CORE
+1V8_DAC
YB(7)
SDA_5V SDA_MUX
SCL_MUX
27M_CLK
SYSCLK
RESET
UVA(1)
UVA(0)
YA(0)
UVA(6)
UVA(5)
UVA(4)
UVA(3)
UVA(2)
UVA(9)
UVA(8)
YA(1)
UVA(7)
YA(6)
YA(5)
YA(4)
YA(3)
YA(2)
YA(9)
YA(8)
YA(7)
+1V8_DAC
DAC_G
DAC_B
P-scan_DeInterlacer
P 1
PSCAN (1/3)