Pin
Function Name
TYPE
PULL
Detail of Function
No.
(1)
(2)
27
EMA_A[10]/ GP1[10]
O
IPU
EMIFA address bus
28
CVDD (Core supply)
PWR
1.2-V core supply voltage pins
29
EMA_A[0]/ GP1[0]
O
IPD
EMIFA address bus
30
EMA_A[1]/MMCSD_CLK/UHPI_HCNTL0/GP1[1]
O
IPU
EMIFA address bus
I/O
IPU
UHPI access control
O
IPU
MMCSD_CLK
31
EMA_A[2]/MMCSD_CMD/UHPI_HCNTL1/GP1[2]
O
IPU
EMIFA address bus
I/O
IPU
UHPI access control
I/O
IPU
MMCSD_CMD
32
EMA_A[3]/ GP1[3]
O
IPD
EMIFA address bus
33
DVDD (I/O supply)
PWR
3.3-V I/O supply voltage pins
34
EMA_A[4]/ GP1[4]
O
IPD
EMIFA address bus
35
EMA_A[5]/ GP1[5]
O
IPD
EMIFA address bus
36
EMA_A[6]/ GP1[6]
O
IPD
EMIFA address bus
37
EMA_A[7]/ GP1[7]
O
IPD
EMIFA address bus
38
CVDD (Core supply)
PWR
1.2-V core supply voltage pins
39
EMA_A[8]/ GP1[8]
O
IPU
EMIFA address bus
40
EMA_A[9]/ GP1[9]
O
IPU
EMIFA address bus
41
EMA_A[11]/ GP1[11]
O
IPU
EMIFA address bus
42
EMA_A[12]/ GP1[12]
O
IPU
EMIFA address bus
43
DVDD (I/O supply)
PWR
3.3-V I/O supply voltage pins
44
EMA_D[0]/MMCSD_DAT[0]/UHPI_HD[0]/GP0[0]/
I/O
IPU
EMIFA data bus
BOOT[12]
I
IPU
BOOT[12]
I/O
IPU
UHPI data bus
I/O
IPU
MMC/SD data
45
EMA_D[1]/MMCSD_DAT[1]/UHPI_HD[1]/GP0[1]
I/O
IPU
EMIFA data bus
I/O
IPU
UHPI data bus
I/O
IPU
MMC/SD data
46
EMA_D[2]/MMCSD_DAT[2]/UHPI_HD[2]/GP0[2]
I/O
IPU
EMIFA data bus
I/O
IPU
UHPI data bus
I/O
IPU
MMC/SD data
47
DVDD (I/O supply)
PWR
3.3-V I/O supply voltage pins
48
EMA_D[3]/MMCSD_DAT[3]/UHPI_HD[3]/GP0[3]
I/O
IPU
EMIFA data bus
I/O
IPU
UHPI data bus
I/O
IPU
MMC/SD data
49
EMA_D[4]/MMCSD_DAT[4]/UHPI_HD[4]/GP0[4]
I/O
IPU
EMIFA data bus
I/O
IPU
UHPI data bus
I/O
IPU
MMC/SD data
50
CVDD (Core supply)
PWR
1.2-V core supply voltage pins
51
EMA_D[5]/MMCSD_DAT[5]/UHPI_HD[5]/GP0[5]
I/O
IPU
EMIFA data bus
I/O
IPU
UHPI data bus
I/O
IPU
MMC/SD data
52
EMA_D[6]/MMCSD_DAT[6]/UHPI_HD[6]/GP0[6]
I/O
IPU
EMIFA data bus
I/O
IPU
UHPI data bus
I/O
IPU
MMC/SD data
53
DVDD (I/O supply)
PWR
3.3-V I/O supply voltage pins
54
EMA_D[7]/MMCSD_DAT[7]/UHPI_HD[7]/GP0[7]/
I/O
IPU
EMIFA data bus
BOOT[13]
I
IPU
BOOT[13]
I/O
IPU
UHPI data bus
I/O
IPU
MMC/SD data
55
EMA_WE /UHPI_HRW/AXR0[12]/GP2[3]/BOOT[14]
O
IPU
EMIFA SDRAM write enable
I
IPU
BOOT[14]
I/O
IPU
UHPI read/write
I/O
IPU
McASP0 serial data
56
CVDD (Core supply)
PWR
1.2-V core supply voltage pins
57
EMB_CAS
O
IPU
EMIFB column address strobe
58
DVDD (I/O supply)
PWR
3.3-V I/O supply voltage pins
59
EMB_WE
O
IPU
EMIFB write enable
60
EMB_WE_DQM[0] /GP5[15]
O
IPU
EMIFB write enable/data mask for EMB_D.
76
RX-V675/HTR-6066/RX-A730/TSR-6750
RX-V675/HTR-6066/
RX-A730/TSR-6750
Содержание RX-V675
Страница 126: ...MEMO MEMO RX V675 HTR 6066 RX A730 TSR 6750 126...
Страница 167: ...167 RX V675 HTR 6066 RX A730 TSR 6750 RX V675 HTR 6066 RX A730 TSR 6750 ADVANCED SETUP...
Страница 168: ...168 RX V675 HTR 6066 RX A730 TSR 6750 RX V675 HTR 6066 RX A730 TSR 6750...
Страница 181: ...181 RX V675 HTR 6066 RX A730 TSR 6750 RX V675 HTR 6066 RX A730 TSR 6750 MEMO...
Страница 182: ...RX V675 HTR 6066 RX A730 TSR 6750...