Yamaha HTR-6280, Руководство по обслуживанию

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A
1 2 3 4 5 6 7 8 9
10
BCD
E
F
G
H
I
J
K
L
MN
119
DIGITAL 1/5
RX-V1065/HTR-6280/AX-V1065
SCHEMA
TIC DIA
GR
AMS
★
All voltages are measured with a 10MΩ/V DC electronic voltmeter.
★
Components having special characteristics are marked
⚠
and must be replaced
with parts having specifications equal to those originally installed.
★
Schematic diagram is subject to change without notice.
●
電圧は、内部抵抗
10MΩの電圧計で測定したものです。
●
⚠印のある部品は、安全性確保部品を示しています。部品の交換が必要な場合、 パーツリストに記載されている部品を使用してください。
●
本回路図は標準回路図です。改良のため予告なく変更することがございます。
CB4
CB3
CB2
CB1
CB6
IC2
IC11
IC7
IC4
IC3
IC13
IC9
IC8
IC5
CB7
IC10
POINT
A XL1 (Pin 5 of IC4)
A
0 0
0 0
0 0
0 0
0 0
0
0
0
0
0
0 0 0
0 0
0.6
0
0
0
0
0
0
0 0 0
0 0
0.6
3.4 0
0
0.6
0
0
0
0
0
1.7
1.7
1.6
1.5
0
0
0
1.9
1.9
2.2
2.2
2.2
2.2
1.3
1.3
3.4
3.4
1.8
1.5
0
0
0.6
0
0
3.4
1.3
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
1.3
1.3
0.3
1.8
1.9
0
0
1.7
3.4
1.8
0.5
0
0
1.7
0
2.2
2.2
2.2
2.2
2.2
2.3
2.2
2.2
2.2
2.2
2.2
2.2
1.8
2.6
2.5
4.9
4.9
4.9
3.4
0
1.8
1.8
1.8
1.9
1.8
0
0
0
0
0
0
0
0
0
0
0
0
3.4
0
0 3.4
1.5 1.7 1.7
0
0
0
0
0 0 3.4
0 0 0.6
0.2 0.6 0
0
0.2
0.6
3.4
3.4 3.4 2.5 2.6
0
5.0
0 3.0
1.5 1.6 3.4
3.0
0
1.3
1.3 3.4
3.4
3.3
0
3.4
0 0 0 0 0 0 0 0 0
0 0 0
1.7 1.7 1.6 1.5 1.9
1.3 0
3.3
1.8 1.5
0 0
2.2 2.2 2.2 2.2
0 0 0
3.4 3.4 1.8 1.8
0
3.4
3.4
0 0 0 0 0 0 0 0
0
0 0 0 0 0 0 0 0
0 0 5.6 5.6
3.4
1.7 1.3 0 0 0 1.9
2.6
0 0
3.4
0.4 0 0.2
0 0 1.7
1.8
0 0 0 0 0 0 0 0 3.4 1.3
2.2 2.2 2.2 2.2 2.2 2.2 0 1.7
0 0
0.5 1.8
0.4 0.2 1.7
2.6
2.2 2.2 2.2 2.2
1.3
3.4
3.4
0
0
0
0
0
0
0
0.6 0.2
0 0
0.6
0
0
0
0
0
0
5.1
0 4.9
0 4.9
5.1
3.3
4.9
5.1
0
0 0
0.2
0 0
0.6
0
3.4 3.4
1.7
0
1.3
1.7
0
1.3
0
0
0
1.7
0
1.7
1.7
1.7
5.1
5.6
5.5
0
1.9
1.9
0
2.3
3.4
3.4
5.6
8.2
0
0
1.0
3.4
1.3
6.8
2.3
5.6
0
3.4
1.3
1.0
ANAL
OG IN
IC4
: SiI9233ACTU
HDMI receiver
Serial
Host
Interface
(DDC)
Serial Host
Interface
(Local)
CEC
CEC_A
CEC_D HPD0 HPD1 HPD2 HPD3 INT ODCK DE HSYNC VSYNC EVNODD SPDIF SCK/DCLK WS MUTEOUT XTALIN XTALOUT MCLK SCDT Q[35:0] SD[3:0] DR[3:0] DR[3:0]
DSDA0 DSDA1 DSDA2 DSDA3 DSCL0 DSCL1 DSCL2 DSCL3
CSDA CSCL
CI2CA R0XC+ R0XC- R0X0+ R0X0- R0X1+ R0X1- R0X2+ R0X2- R0XC+ R0XC- R0X0+ R0X0- R0X1+ R0X1- R0X2+ R0X2- R0XC+ R0XC- R0X0+ R0X0- R0X1+ R0X1- R0X2+ R0X2- R0XC+ R0XC- R0X0+ R0X0- R0X1+ R0X1- R0X2+ R0X2-
R0PWR5V R1PWR5V R2PWR5V R3PWR5V
RESET#
HDCP
Registers
Video HDCP
Unmask
Audio HDCP
Unmask
SCDT
Logic
Reset
Logic
HDMI
Decode
HDMI
Receiver
Mux
SRAM
EDID
NVRAM
Video Processing
Audio Processing
APLL
Auto Video Configuration
Video Output
Format
Audio Output
Audio Clock Regeneration
S/PDIF Output
I 2
S/
DSD
Output
Up/Down Sampling
Deep Color
Color
Space
Converter
HDPC
Engine
Hot Plug
Controller
Embedded HDCP Keys
RPI
Registers and State Machine
Configuration
and Status
Registers
A/V Split
Auto
Audio/
Exception
IC8, 9
: BD9323EFJ-E2
1 ch step down DC/DC converter
IBIA
S
ERR
FB EN
BS
T
OUTPUT
VIN SW
GND
OPEN
A
U
T
OMA
TIC
S
T
AR
TUP
COMP
SS
VREF
VRE
G
OSC TSD
S DR
V
R L
O
GIC
SL
OPE
Sof
t St
ar
t
UVL
O
VC
C
5V
12
V
8 6
PWM
OCP LV
S
LV
S
7 1
5
4 3 2
IC7
: SiI9134CTU
HDMI transmitter
XOR Mask
DSCL DSDA
EXT_SWING
Tx0 Tx1 Tx2 TxC
CSDA
RESET#
MCLK
S/PDIF
SCK
WS DE
IDCK
VSYNC HSYNC
SD[3:0] DL[3:0] DR[3:0] D[35:0]
INT
HPD
CSCL
Registers
and
Configuration
Logic
HDCP Keys
EEPROM
E-DDC Master
CI2CA
Slave Video Data
Capture
Logic/DE Generator
HDCP
Encryption
Engine
HDMI 1.3
TMDS Core
Audio
Capture
Logic
YCbCr to RGB
Color Space
Converter/
4:2:2 to 4:4:4
Converter
IC11
: TC74VHC157FT
Quad 2-channel multiplexer
SELECT
1
1A
2
1B
3
1Y
4
2A
5
2B
6
2Y
7
GND
8
Vcc
16
ST
15
4A
14
4B
13
4Y
12
3A
11
3B
10
3Y
9
AS
G
BA YB AY BA YY
B
V
OU
T
V
IN
Control
GND
1
4
5 2
IC1
0
: NJM2867F3-05
Lo
w dr
opout v
olt
age r
egulat
or
Bandgap
Reference
Thermal
Protection
V
DD
CE
Pin No
.
1 2 3 4 5
S
ymbol
CE
GND
NC V
DD
V
OUT
Descr
iption
Chip Enab
le Pin (“H”
A
ctiv
e)
Gr
ound Pin
No C
onnection
Input Pin Output Pin
Vr
ef
45 12
Curr
ent Limit
V
OUT
GND
IC1
3
: R1
1
72H50
1D-T1
-F
V
olt
age r
egulat
or
V
DD CE
Pin No
.
1
2, 5
3 4 6
S
ymbol
V
OUT
GND
CE
NC VDD
Descr
iption
Output Pin of
V
olt
age R
egulat
or
Gr
ound Pin
Chip Enab
le Pin
No C
onnection
Input Pin
Vr
ef
61 3
2,5
Curr
ent Limit
V
OUT
GND
IC5
: R1
1
72S1
21D-E2-F
V
olt
age r
egulat
or
1
DIR
A1 A2 A3 A4 A5 A6 A7 A8
GND
Vcc OE B1 B2 B3 B4 B5 B6 B7 B8
2 3 4 5 6 7 8 9
10
20
19 18 17 16 15 14 13 12 11
IC2
: SN74LVC245APWR
Octal bus transceivers with 3-state outputs
1 2 3
NC
IN A
GND
4 5
OUT Y V
CC
A
L
H
Y H L
IC3
:
TC7SH04FU-TE85L
Inverter
HDMI 2
HDMI 3
HDMI 4
HDMI 1 (BD/DVD)
HDMI OUT
HDMI Rx
HDMI Tx
SELECTOR
BUFFER
to
DIGI
T
AL 3/5
to
DIGI
T
AL 2/5
to
DIGI
T
AL 5/5
No replacement part available.
サービス部品供給なし
No replacement part available.
サービス部品供給なし
No replacement part available.
サービス部品供給なし
to VIDEO (3)_W3801 P
age 130
I8