C 1 - 3
B U S ̲ F P G A : O K
C1-3. BUS
FPGA
Communication and bus line connection between microprocessor (IC81) and FPGA (IC51) are checked.
OK : No error detected
NG : An error is detected
C1-4. I2C
The I2C (Inter integrated route) bus line connection is checked.
0
: No error detected
1
: An error is detected
C 1 - 4
I 2 C : 0 0 0 0 0 0 - - -
–
–
–
Error detection of HDMI transmitter (IC61)
Error detection of Video encoder (IC22)
Error detection of Video decoder (IC21)
Error detection of HDMI receiver (IC3)
Error detection of HDMI switch 2 (IC2)
Error detection of HDMI switch 1 (IC1)
C 1 - 5
F P G A ̲ R A M : O K
C1-5. FPGA
RAM
Reading/writing SDRAM (IC52) are checked.
OK : No error detected
NG : An error is detected
C 1 - 6
D I R B U S : O K
C1-6. BUS
DIR
Communication and bus line connection between microprocessor (IC81) and DIR (IC924) are checked.
OK : No error detected
NG : An error is detected
49
RX-V671/HTR-6064/RX-A710
RX-V671/HTR-6064/
RX-A71
0
DRAFT