MX1Z
15
PIN
NO.
I/O
FUNCTION
NAME
PIN
NO.
I/O
FUNCTION
NAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
8"//5"
XTALSET
/RESET
E//RD
RW//WR
/CS
/DACK
RS0
RS1
VSS1
VSS2
D0
D1
D2
D3
D4
D5
D6
D7
/DREQ
/IRQ
/DEND
VSS3
1/2 EX1
VCC1
NUM1
NUM3
IFS
SFORM
/INP
/READY
/WPRT
I
I
I
I
I
I
I
I
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
I
I
I
I
I
I
I
I
Data transmission speed
Clock select
Rest
Enable/Read
Read/write/Write
Chip select
DMA acknowledge
Register select
Ground
Data bus
DMA request
Interrupt request
Data end
Ground
Power supply
Host interface select
Format data
Index pulse
Ready from FDD
Write control signal
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
/TRKO
/INDEX
/RDATA
XTAL2
EXTAL2
NC
XTAL1
EXTAL1
VSS4
VSS5
NC
VCC2
VCC3
VCC4
/WGATE
/WDATA
VSS6
/STEP
/HDIR
/HLOAD
/HSEL
VSS7
/DS0
/DS1
/DS2
/DS3
VSS8
/MON0
/MON1
/MON2
/MON3
VSS9
I
I
I
O
O
O
O
O
O
O
O
O
O
O
O
O
O
Track 00 signal
Index signal
Read data input from FDD
Clock
Clock
Ground
Power supply
Write control
Writ data to FDD
Ground
Step signal to control head of FDD
Direction
Head load
Head select
Ground
Drive select
Ground
Motor on
Ground
HD63266F (XI939A00) FDC (Floppy Disk Controller)
EMK-CTL: IC202
PIN
NO.
I/O
FUNCTION
NAME
PIN
NO.
I/O
FUNCTION
NAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
D0
/WR
/RD
/S
BM
INTR
RxD3
TxD3
RxD2
TxD2
RxD1
TxD1
P16
P15
P14
P13
P12
CNVss
/RES
INT
P10
XIN
XOUT
Vss
PO7
PO6
PO5
PO4
PO3
PO2
PO1
PO0
I/O
O
O
I
I
O
I
O
I
O
I
O
I
I
I
I
I
-
I
I
I
I
O
-
I
I
I
I
I
I
I
I
Data 0
/WR
/RD
Chip Enable
Fixed to Low
IRQ Request
Receive data CH 3
Transmit data CH 3
Receive data CH 2
Transmit data CH 2
Receive data CH 1
Transmit data CH 1
Remote control data 6
Remote control data 5
Remote control data 4
Remote control data 3
Remote control data 2
GND
Reset
Not used
Remote control data1
8 MHz
NC
GND
Panel switch read 7
Panel switch read 6
Panel switch read 5
Panel switch read 4
Panel switch read 3
Panel switch read 2
Panel switch read 1
Panel switch read 0
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
A7
A6
A5
A4
A3
A2
A1
A0
Vcc
D7
D6
D5
D4
D3
D2
D1
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
-
I/O
I/O
I/O
I/O
I/O
I/O
I/O
NC
NC
Panel matrix sink 5
Panel matrix sink 4
Panel matrix sink 3
Panel matrix sink 2
Panel matrix sink 1
Panel matrix sink 0
Panel matrix source 7
Panel matrix source 6
Panel matrix source 5
Panel matrix source 4
Panel matrix source 3
Panel matrix source 2
Panel matrix source 1
Panel matrix source 0
Address 7
Address 6
Address 5
Address 4
Address 3
Address 2
Address 1
Address 0
+5
Data 7
Data 6
Data 5
Data 4
Data 3
Data 2
Data 1
SCI (XS345A00) CPU
EMK-CTL: IC306