DG80-112
12
IC BLOCK DIAGRAM
Q
D CK
OE
Q
D CK
OE
Q
D CK
OE
Q
D CK
OE
OUTPUT
CONTROL
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
TCHCU04AF-TP1(XD660A00)
Hex Inverter
SN74HC08NSR(XD831A00)
Quad 2 Input AND
1
2
3
1A
1Y
4
2A
5
2B
6
2Y
7
VSS
1B
14
13
12
VDD
4A
11
4Y
10
3B
9
3A
8
3Y
4B
1
2
3
A
QA
QA
4
QB
QB
5
QC
QC
6
QD
QD
7
GND
B
B
14
13
12
VCC
QG
QG
11
QF
QF
10
QE
QE
9
CLEAR
CLEAR
8
CLOCK
QH
CK
QH
1
2
3
1A
1Y
4
2A
5
2B
6
2Y
7
GND
1B
14
13
12
Vcc
4A
11
4Y
10
3B
9
3A
8
3Y
4B
TC74VHC32F(XN963A00)
Quad 2 Input OR
SN74HC244NSR(XD233A00)
Octal 3-State Bus Buffer
TC74HC157AF-TP1(XH603A00)
Quad 2 to 1 Multiplexer
TC74HC175AF -TP1(XD658A00)
Quad D-Type Flip-Flop
TC74HC4040F(XR684A00)
12-Stage Binary Ripple Counter
TC74HC164AF(XQ967A00)
8-Bit Shift Register
SN74HC374ANSR(XQ042A00)
Octal 3-State D-Type Flip-Flop
Vcc
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLOCK
Q
D
CK
OE
Q
D
CK
OE
CK
Q
D
CK
OE
Q
D
CK
OE
1G
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VDD (Vcc)
2G
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
(GND) Vss
Q CL
Q
D
CK
1
2
3
4
5
6
7
1A
1Y
2A
2Y
3A
3Y
Vss
14
13
12
11
10
9
8
VDD
6A
6Y
5A
5Y
4A
4Y
Q CL
Q
D
CK
Q
CL
Q
D
CK
Q
CL
Q
D
CK
1
2
3
4
5
6
7
CL
1Q
1Q
1D
2D
2Q
2Q
16
15
14
13
12
11
10
VDD
4Q
4Q
4D
3D
3Q
3Q
8
Vss
9
CK
OUTPUTS
OUTPUTS
SIRIAL
INPUT
A
A
1
2
3
4
5
6
7
SELECT
1A
1A
1B
1B
1Y
1Y
2A
2A
2B
2B
2Y
2Y
16
15
14
13
12
11
10
Vcc
STROBE
G
4A
S3
Y
4A
4B
4B
4Y
4Y
3A
3A
3B
3B
8
GND
9
3Y
1
2
3
4
5
6
7
Q12
Q12
Q6
Q6
Q5
Q5
Q7
Q7
Q4
Q4
Q3
Q3
Q2
Q2
16
15
14
13
12
11
10
VDD
Q11
Q11
Q10
Q10
Q8
Q8
Q9
Q9
CLR
CL
Input Pulses ( )
8
Vss
9
Q1
Q1
DM : IC 101
DM : IC 33
DM : IC 28, 29
DM : IC 35, 36
DM : IC 110
DM : IC 18
DM : IC 21, 27
DN : IC 202 – 205
DM : IC 117
DM : IC 102