Yaesu FRG-100, Техническое дополнение

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Circuit Description
Potentiometer VR3601 located on the VR
Unit. A of the pre-amplified audio
600 is also delivered to the
REC
on the
rear
Blanker AGC Circuit
In the AM, SSB and CW modes, when the
noise blanker is on, a of the 455 kHz
2nd IF is tapped from the output of
then through noise blanker
plifiers and
tected by D1003 D1004, then fed back to the
amplifiers Q1004 controlling their
The time of this loop is
signed so that noise detected at D1003
produce a strong DC pulse for the
of RF noise pulse. This DC
blanking is returned to the noise
ing gate Controller
switching them off the noise pulse and
preventing the 2nd IF from
the narrow IF filters while the noise is present.
AGC is provided for all modes,
with a selectable fast or slow decay. The out-
put from buffer amplifier is
tified by AGC detector D1026 and D1027
and then delivered to AGC
plifier Q1020 The is
essed by then amplified again
by and delivered to
and to amplifier gain,
and level.
PLL Frequency Synthesizer
The PLL on the Unit consists
of Main Loop, DDS and the 2nd oscilla-
tor circuitry. The PLL IC (CX-7925B)
contains a reference oscillator/divider,
parallel data programmable divider,
and a
1st
Signal Generation
The 1st (47.260 77.210 MHz)
is generated by PLL Synthesis control of
CPU on the Unit. In the main loop, one
of is activated by the
CPU and selected via Q2040
to the frequency of Operation. The
output of the selected VCO is buffered by
Q2045 and before
delivery to mixer Q2012
is then mixed with the DDS and
low-pass buffered by
and amplified by Q2024 before
ing returned to PLL IC Q2030.
In the main divider/phase
tion of IC, the VCO is divided by
128, according to a control (serial
vider programming data) from the CPU to
produce 83. kHz.
This is then applied to the
detector for with
the 10.4875 MHz reference from the
OSC
UN IT. Any
between the
two will produce a 5-V pulsed-DC out-
put with pulse on the
This pulse train is converted
to DC by pump and
Q2023 low-pass filtered to
the varactor control voltage and
then is applied to the varactor D2002 D2005
in the selected VCO to the
VCO oscillating frequency to be
to the 10.4875 MHz reference.
The for Loop 1 is the
uct of either Loop 1 Mixer or
the of the output of this mixer
mixed with the 10.4875 crystal reference
nal,
to the band of Operation.
2nd Signal Generation
A of 2nd oscillator
(46.755 MHz), is derived from
is delivered to mixer
it also is applied to the 2nd
amplifier (on the main unit) after
ation and through the LPF formed by
C21.46 & C2147.
The sampled reference (10.48576
MHz), is generated by Q2030, is halved
by frequency divider The output
from the (5.24288 MHz) is low-pass
filtered, then mixed with the DDS output
(286.16 368.07 kHz) in mixer Q2034
(SN1 is also by the
MPU. The output from Q2034 is band-pass
filtered (5.57 MHz) by CF2001 before delivery
to mixer Q2028 along with the 2nd
Signal. The is band-pass
00
Supplement