XVME-653/658 Manual
4-6
Service Routine (ISR) to be executed. The Universe connects to all four PCI bus inter-
rupts. These interrupts may be shared by other PCI bus devices. The BIOS maps the PCI
bus interrupts to the AT-bus interrupt controllers on IRQ11.
Because the PCI devices share interrupt lines, all ISR routines must be prepared to chain
the interrupt vector to allow the other devices to be serviced.
Note
All PCI devices on the XVME-653/658 are routed through IRQ11.
Caution
IRQ10 is defined for the Abort toggle switch.
VMEbus Interrupt Generation
The XVME-653/658 can generate VMEbus interrupts on all seven levels. There is a
unique STATUS/ID associated with each level. Upper bits are programmed in the
STATUS/ID register. The lowest bit is cleared if the source of the interrupt is a software
interrupt, and set for all other interrupt sources. Consult the Universe User’s Manual for
a more in-depth explanation.
VMEbus Reset Options
When the front panel
Reset
switch is toggled, the XVME-653/658 can perform the fol-
lowing reset options:
1.
Reset the VME backplane only.
2.
Reset the XVME-653/658 CPU only.
3.
Reset both.
4.
Reset neither.
See
Switch Settings
on p. 2-4 for information on how to configure the
Reset
options.
PCI BIOS Functions
Special PCI BIOS functions provide a software interface to the Universe chip, providing
the PCI-to-VMEbus interface. These PCI BIOS functions are invoked using function and
subfunction codes. A user sets up the host processor registers for the function and sub-
function desired and calls the PCI BIOS software. The PCI BIOS function code is B1h.
Status is returned using the Carry flag ([CF]) and registers specific to the subfunction in-
voked.
Access to the PCI BIOS special functions for 16-bit callers is provided through interrupt
1Ah. Thirty-two bit (i.e., protect mode) access is provided by calling through a 32-bit
protect mode entry point.
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