Xycom XVME 590, Руководство пользователя

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XVME-500/590 Manual
February, I988
A specific register on the module can be accessed by simply adding the specific
register offset to the module base address.
For example, the module Status/Control
Register is located at address 81H within the I/O interface block.
Thus, if the
module base address is jumpered to l000H, the Status/Control Register would be
accessible at address 108IH.
(Module base address)
1OOOH +
(Register offset)
81H
=
(Status/Control Reg.)
1081H
For memory-mapped CPU modules (such as 68000 CPU modules), the short I/O
address space is memory-mapped to begin at a specific address.
For such modules,
the register offset is an offset from the start of this memory-mapped short I/O
address space.
For example, if the short I/O address space of a 68000 CPU module
starts at F90000H, and if the base address of the XVME-500/590 is set at lOOOH,
.
then the actual module base address would be F91000H.
3.3 INTERFACE BLOCK
Each of the following programming locations of the XVME-500/590 interface block
(previously shown in Figure 3-1) are defined in greater detail in this chapter’s
remaining sections:
Status/Control Register (base + 81H): (Section 3.3.1) The status/control
register contains eight single-bit locations which provide control signals to
reset the module, enable interrupts, start conversion, show if there are
interrupts pending, and select the mode of analog input operation (i.e., single
channel, sequential channel, random channel and external trigger).
Interrupt Acknowledge (IACK) Vector Register (base + 83H): (Section 3.3.2)
Holds the vector to be driven onto the VMEbus when an interrupt generated
by the input module is acknowledged.
Gain/Channel Register (base + 85H): (Section 3.3.3) This register is used to
initiate random channel conversions, and to program a 32-element input gain
RAM as part of an input initialization procedure.
The lower five bits of this
register are used to select one of the input channels for conversion, or gain
programming.
The sixth bit determines whether the register is used to
program gain, or to read the gain and convert a specific channel. The upper
t w o b i t s a r e u s e d t o s e l e c t o n e o f f o u r a l l o w a b l e g a i n s e t t i n g s t o b e
programmed for a selected channel.
A/D Input High Byte (base + 86H) and A/D Input Low Byte (base + 87H):
(Section 3.3.4)
These locations contain the digital data which results from
A/D conversions.
3-3