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Document Number: 646710

29

User Configurable Switches

1

User Configurable Switches

The XPMC-6710 has two user configurable switches on the PMC (SW2 and SW3). Switch 
SW2 controls the speed of the local Processor, while SW3 controls the power up configuration 
for the board. See Figure 1-3 for an illustration of the switch settings and there location.

 

Figure 1-3  

Location of User Configurable Switches

NOTE:

 Switches S2 and S3 are located on the bottom side of the board.

Switch SW2

1 2 3 4 5 6 7 8

ON

SW3

1 2 3 4 5 6 7 8

ON

1 and 2

0:1 = Release PCI/X
interface from reset
after main reset
is released
1:0 = Hold PCI/X 
interface in reset after
master reset is released.
0:0 = Invalid
1:1 = Invalid

PWRUP_PCI_SWRST

3 and 4    PWRUP_PB_SWRST     0:1 =  Enable Processor
 

 

 

 

 

          after master reset is 

                                                  released.
   

 

 

 

                  1:0 = Hold Processor 

                                                  interface in reset after 
                                                  master reset is released.
                                                  0:0 = Invalid
                                                  1:1 = Invalid

5 and 6    PWRUP_PCI1_SWRST  Reserved = Leave both of 
                                                  these switches in the OFF
                                                  position.
7 and 8    PWRUP_PCI1_BYP       Reserved = Leave both of 
                                                  these switches in the OFF
                                                  position.
                             

Switch SW2

1   2   3  4  5

1   0   1   0   0 = 800MHz

1   2   3  4  5

1   0   0   0   0 = 600MHz

ON

1   2   3  4  5
1   0   1   1   0 = 1.0GHz

1   2   3  4  5

1   0   0   1   0 = 1.2GHz

1   2   3  4  5

0   1   0   1   0 = 1.3GHz

1   2   3  4  5

0   0   1   0   0 = 1.4GHz

1   2   3  4  5

0   0   0   1   0 = 1.5GHz

1   2   3  4  5

1   1   0   0   0 = 1.6GHz

1   2   3  4  5

0   1   1   0   0 = 1.7GHz

ON (UP) = Low (0)
OFF (Down) = High (1)

Switch

Signal

Description

Pos 6                               *WP                ON: Write Protect Boot Flash

Pos 7                               *FWP              ON: Write Protect Data Flash

Pos8                                GPIO8            User Defined Input

PMC710

0       1    

    2     

  3  

A1

L1

A0

L0

USER 

DEFIN

ED 

SER

IAL

LAN0

  

Switch SW3

Switch

Signal

Description

SW2

6   7   8

6   7   8

6   7   8

(ON)

(ON)

(ON)

Содержание Xembedded XPMC-6710

Страница 1: ...XPMC 6710 Processor PMC Module REFERENCE MANUAL Document Number 646710 September 26 2006 retired...

Страница 2: ...This page is intentionally left blank...

Страница 3: ...aded for personal use or referenced in another document as a URL to the Xembedded Incorporated Web site The text itself may not be published commercially in print or electronic form edited translated...

Страница 4: ...This page is intentionally left blank...

Страница 5: ...5461S Gigabit Transceiver 16 Features 16 GPIO Configuration 17 Temperature Sensing 18 Specifications 19 Safety 19 EMC 19 About This Manual 20 Feedback 20 References 20 Safety Summary 21 Ground the Sys...

Страница 6: ...Sources of Reset 24 Front Panel I O 25 Rear I O 26 Installation 27 Installation Procedure 27 User Configurable Switches 29 PMC Connectors 30 PMC Site Connector J1 30 PMC Site Connector J2 31 PMC Site...

Страница 7: ...d Back Views 12 XPMC 6710 Front Panel 25 Typical PMC Installation 28 Location of User Configurable Switches 29 J1 Connector 30 J2 Connector 31 J3 Connector 32 J4 Connector 33 Serial Port Mini USB Conn...

Страница 8: ...XPMC 6710 Reference Manual 8 Document Number 646710 This page is intentionally left blank...

Страница 9: ...XPMC 6710 Product Specification 19 XPMC 6710 Rear I O 26 PMC Connector J1 Pinout 30 PMC Connector J2 Pinout 31 PMC Connector J3 Pinout 32 PMC Connector J4 Pinout 33 Serial Port Connector J2 Mini USB P...

Страница 10: ...XPMC 6710 Reference Manual 10 Document Number 646710 This page is intentionally left blank...

Страница 11: ...s Figure 1 is an Illustration of the XPMC 6710 functional block diagram The XPMC 6710 utilizes the XPIM 710 PMC I O Module to convert the rear I O signals to standard connectors J1 A and J1 B of the X...

Страница 12: ...w Heatsink Tsi109 Host Bridge LAN0 and LAN1 LEDs Battery LAN0 RJ 45 Conn GPIO User Defined LEDs Serial Port Mini USB Conn Memory CMC Conns P1 thru P4 Front View Switch SW2 Up to 1 Gbyte DDR II 400MHz...

Страница 13: ...power up and may be an interrupt handler A Non monarch is therefore not the main CPU does not perform PCI bus enumeration after power up and may be an interrupt generator The MONARCH signal defines a...

Страница 14: ...resolution 3D graphics motion video MPEG2 MPEG4 high fidelity audio 3D audio AC 3 and so on AltiVec computational instructions are executed in the four independent pipelined AltiVec execution units A...

Страница 15: ...ost bridging It delivers industry leading performance for customers in the wireless infrastructure storage networking network access printer military and industrial automation markets Features 2 5W ty...

Страница 16: ...r Echo NEXT and FEXT Low power is a key factor in implementing Gigabit small form factor NICs and uplinks less than 700 mW per port the BCM5461S has the industry s lowest power requirement For NIC app...

Страница 17: ...ted transition low to high or a high to low or a level detected state Table 1 below list the location and destination of the GPIOs Table 1 GPIOs Signals and Destinations Signal Destination GPIO0 J4 Pi...

Страница 18: ...unning mode The analog input multiplexer alternately selects either the on chip temperature sensor to measure its local temperature or the remote temperature sensor The ADC digitizes these signals and...

Страница 19: ...sign to meet or exceed UL 60950 3rd Ed CSA C22 2 No 60950 00 EN60950 IEC 60950 a EMC Design to meet or exceed FCC 47 CFR Part 15 Class B CE Mark to EN55022 EN55024 Warranty 2 year limited Table 2 XPMC...

Страница 20: ...mes feedback about how we can make our manuals and technical documentation more useful to our customers Please feel free to send comments and suggestions to support Xembedded com References American N...

Страница 21: ...ironment constitutes a definite safety hazard Keep Away from Live Circuits Operating personnel must not remove product covers Component replacement and internal adjustments must be made by qualified m...

Страница 22: ...em WARNING This sign denotes a hazard It calls attention to a procedure practice or condition which if not correctly performed or adhered to could result in injury or death to personnel CAUTION This s...

Страница 23: ...oadcom BCM5461S Gigabit Transceivers The first Gigabit Port is routed to the front as well as to the back J4 connector The Front or the Rear option is set by Software The Second port is only routed to...

Страница 24: ...XPMC 6710 Power on reset PCI reset from the Carrier module COP Header if JTAG is used Tsi109 GPIO11 SW1 on the back of the board during debugging The XPMC 6710 also outputs the RESETOUT on Pin 60 of...

Страница 25: ...the GPIOs Figure 1 1 is a drawing depicting the front Bezel The four user defined LEDs are OFF by default Figure 1 1 XPMC 6710 Front Panel PMC710 LAN0 A1 L1 A0 L0 SERIAL USER DEFINED 0 1 2 3 A1 L1 A0...

Страница 26: ...rear I O available consisting of the following see Table 1 1 below Table 1 1 XPMC 6710 Rear I O Signal Connector JTAG Header for CPLD J4 Dual 10 100 1000 Mbit Ethernet J4 Dual RS 232 Serial interface...

Страница 27: ...ee Figure 1 3 on page 29 for the switch configurations 2 Install the standoffs on the board as shown in Figure 1 2 on page 28 3 Remove the blank covering the PMC site from the carrier if applicable In...

Страница 28: ...ment Number 646710 1 XPMC 6710 Reference Manual Figure 1 2 Typical PMC Installation Back of Carrier Board Solder Side PMC Mounting on the Carrier Board Front View PMC Mounting on the Carrier Board Rea...

Страница 29: ...RST 3 and 4 PWRUP_PB_SWRST 0 1 Enable Processor after master reset is released 1 0 Hold Processor interface in reset after master reset is released 0 0 Invalid 1 1 Invalid 5 and 6 PWRUP_PCI1_SWRST Res...

Страница 30: ...Pinout Pin No Signal Pin No Signal 1 N C 2 N C 3 GND 4 PCI_INTA 5 PCI_INTB 6 PCI_INTC 7 Present 8 5V 9 PCI_INTD 10 N C 11 GND 12 N C 13 PCI_CLK 14 GND 15 GND 16 PCI_GNT1 17 PCI_REQ1 18 5V 19 N C 20 PC...

Страница 31: ...16 N C 17 PCI_PME 18 GND 19 PCI_AD30 20 PCI_AD29 21 GND 22 PCI_AD26 23 PCI_AD18 24 3 3V 25 PCI_IDSEL 26 PCI_AD23 27 3 3V 28 PCI_AD20 29 PCI_AD18 30 GND 31 PCI_AD16 32 PCI_C BE2 33 GND 34 N C 35 PCI_TR...

Страница 32: ...I_AD61 14 GND 15 GND 16 PCI_AD60 17 PCI_AD59 18 PCI_AD58 19 PCI_AD57 20 GND 21 N C 22 PCI_AD56 23 PCI_AD55 24 PCI_AD54 25 PCI_AD53 26 GND 27 GND 28 PCI_AD52 29 PCI_AD51 30 PCI_AD50 31 PCI_AD49 32 GND...

Страница 33: ...12 GND 13 TRD0 1M 14 TRD2 1M 15 TRD0 1M 16 TRD2 1M 17 GND 18 GND 19 TRD1 1M 20 TRD3 1M 21 TRD1 1M 22 TRD3 1M 23 GND 24 GND 25 GND 26 GND 27 U0TX C 28 U1TX C 29 U0RX C 30 U1RX C 31 GND 32 GND 33 SCL 34...

Страница 34: ...XPMC 6710 Reference Manual Serial Port Connector J2 Mini USB Figure 1 8 Serial Port Mini USB Connector J2 Table 1 6 Serial Port Connector J2 Mini USB Pinout Pin No Signal 1 N C 2 Serial 0 TX 3 Serial...

Страница 35: ...red Jack 45 the RJ 45 is an eight wire connector used commonly to connect computers onto a local area networks LAN especially Ethernet RJ 45 connectors look similar to the ubiquitous RJ 11 connectors...

Страница 36: ...8 P5 JTAG Header Pinout Pin No Signal Pin No Signal 1 CPUTD0 2 COPQACK 3 CPUTD1 4 COPTRST 5 COPUP0 6 VDD_SENSE 7 CPUTCK 8 CKSTP_IN 9 CPUTMS 10 N C 11 COPSRESET 12 GND 13 COPHRESET 14 N C 15 CKSTP_OUT...

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