Document Number: 646710
29
User Configurable Switches
1
User Configurable Switches
The XPMC-6710 has two user configurable switches on the PMC (SW2 and SW3). Switch
SW2 controls the speed of the local Processor, while SW3 controls the power up configuration
for the board. See Figure 1-3 for an illustration of the switch settings and there location.
Figure 1-3
Location of User Configurable Switches
NOTE:
Switches S2 and S3 are located on the bottom side of the board.
Switch SW2
1 2 3 4 5 6 7 8
ON
SW3
1 2 3 4 5 6 7 8
ON
1 and 2
0:1 = Release PCI/X
interface from reset
after main reset
is released
1:0 = Hold PCI/X
interface in reset after
master reset is released.
0:0 = Invalid
1:1 = Invalid
PWRUP_PCI_SWRST
3 and 4 PWRUP_PB_SWRST 0:1 = Enable Processor
after master reset is
released.
1:0 = Hold Processor
interface in reset after
master reset is released.
0:0 = Invalid
1:1 = Invalid
5 and 6 PWRUP_PCI1_SWRST Reserved = Leave both of
these switches in the OFF
position.
7 and 8 PWRUP_PCI1_BYP Reserved = Leave both of
these switches in the OFF
position.
Switch SW2
1 2 3 4 5
1 0 1 0 0 = 800MHz
1 2 3 4 5
1 0 0 0 0 = 600MHz
ON
1 2 3 4 5
1 0 1 1 0 = 1.0GHz
1 2 3 4 5
1 0 0 1 0 = 1.2GHz
1 2 3 4 5
0 1 0 1 0 = 1.3GHz
1 2 3 4 5
0 0 1 0 0 = 1.4GHz
1 2 3 4 5
0 0 0 1 0 = 1.5GHz
1 2 3 4 5
1 1 0 0 0 = 1.6GHz
1 2 3 4 5
0 1 1 0 0 = 1.7GHz
ON (UP) = Low (0)
OFF (Down) = High (1)
Switch
Signal
Description
Pos 6 *WP ON: Write Protect Boot Flash
Pos 7 *FWP ON: Write Protect Data Flash
Pos8 GPIO8 User Defined Input
PMC710
0 1
2
3
A1
L1
A0
L0
USER
DEFIN
ED
SER
IAL
LAN0
Switch SW3
Switch
Signal
Description
SW2
6 7 8
6 7 8
6 7 8
(ON)
(ON)
(ON)
Содержание Xembedded XPMC-6710
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