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64CH Segment Driver For Dot Matrix LCD
20
© 1998 Intech LCD Group Ltd.
3.
Set Page (X Address)
X address (AC0~AC2) of the display data RAM is set in the X address register.
Writing or reading to or from MPU is executed in this specified page until the next page is set.
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
0
1
0
1
1
1
AC2
AC1
AC0
4. Display Start Line (Z Address)
Z address (AC0~AC5) of the display data RAM is set in the display start line register and displayed at
the top of the screen.
When the display duty cycle is 1/64 or others (1/32~1/64), the data of total line number of LCD
screen, from the line specified by display start line instruction, is displayed.
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
0
1
1
AC5
AC4
AC3
AC2
AC1
AC0
5. Status Read
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
1
0
BUS
Y
0
ON/OFF
RESET
0
0
0
0
??
BUSY
When BUSY is 1, the Chip is executing internal operation and no instructions are accepted.
When BUSY is 0, the Chip is ready to accept any instructions.
??
ON/OFF
When ON/OFF is 1, the display is on.
When ON/OFF is 0, the display is off.
??
RESET
When RESET is 1, the system is being initialized.
In this condition, no instructions except status read can be accepted.
When RESET is 0, initializing has finished and the system is in the usual operation condition.
6. Write Display Data
Writes data (D0~D7) into the display data RAM.
After writing instruction, Y address is increased by 1 automatically.
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
1
D7
D6
D5
D4
D3
D2
D1
D0
7. Read Display Data
Reads data (D0~D7) from the display data RAM.
After reading instruction, Y address is increased by 1 automatically.
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
1
1
D7
D6
D5
D4
D3
D2
D1
D0