XIAMEN OCULAR GDM12864A Скачать руководство пользователя страница 11

64CH Common Driver For Dot Matrix LCD    

9

 

© 1998 Intech LCD Group Ltd.

 

AC Characteristics (VDD=4.5~5.5V, Ta=-30? ~+85? ) 

1. Master mode (MS=V

DD

, PCLK2=V

DD

, Cf=20pF, Rf=47KO

)

 

t

WHC

t

WH C

t

WLC

t

SU

t

DH

t

SU

t

D

t

D

t

DM

t

D21

t

D12

t

WH2

t

WH1

t

WL1

t

R

t

F

t

R

t

F

t

DM

t

DF

CL2

DIO1(SHL=V

DD

)

DIO2(SHL=V

SS

)

DIO2(SHL=V

DD

)

DIO1(SHL=V

SS

)

FRM

M

CLK1

CLK2

0.7V

DD

0.7V

DD

0.3V

DD

0.3V

DD

 

 

Characteristic 

Symbol  Min 

Typ  Max 

Unit 

Data Setup Time 

t

SU

 

20 

Data Hold Time 

t

DH

 

40 

Data Delay Time 

t

D

 

FRM Delay Time 

t

DF

 

-2 

M Delay Time   

t

DM

 

-2 

CL2 Low Level Width 

t

WLC

 

35 

CL2 High Level Width 

t

WHC

 

35 

 
 
 

?

s

 

CLK1 Low Level Width 

t

WL1

 

700 

CLK2 Low Level Width 

t

WL2

 

700 

CLK1 High Level Width 

t

WH1

 

2100 

CLK2 High Level Width 

t

WH2

 

2100 

CLK1-CLK2 Phase Difference 

t

D12

 

700 

CLK2-CLK1 Phase Difference 

t

D21

 

700 

CLK1,CLK2 Rise/Fall Time 

t

R

/t

 F

 

150 

 
 
 
ns 

Содержание GDM12864A

Страница 1: ...User s Guide GDM12864A LCM Liquid Crystal Display Module XIAMEN OCULAR LCD DEVICES CO LTD South 5F Guang Xia Bldg Torch Hi tech Develop Area Xiamen China 361006 Tel 0592 6026045 Fax 0592 6026021...

Страница 2: ...C Electrical Characteristics KS0107B 6 Electrical Absolute Maximum Rating KS0108B 7 DC Electrical Characteristics KS0108B 7 Chapter 2 Driver IC KS0107B Function Description 8 Introduction 8 AC Charact...

Страница 3: ...aphic STN yellow green mode Easy interface with 8 bit MPU Low power consumption LED back light Viewing angle 6 O clock Driving method 1 64 duty 1 6 7 bias LCD driver IC KS0108B 2 KS0107B Connector Zeb...

Страница 4: ...al Dimensions PIN 1 2 3 4 5 6 7 8 9 10 SIGNAL Vss VDD V0 D I R W E DB0 DB1 DB2 DB3 PIN 11 12 13 14 15 16 17 18 19 20 SIGNAL DB4 DB5 DB6 DB7 CS1 CS2 RES VEE A K NOTE 1 All units are mm 2 Tolerances unl...

Страница 5: ...ADC VEE SEG64 DB 0 7 RESETB CS1B CS3 CS2B RESETB DB 0 7 CS2 CS1 E RW RS 12 RS RW E SEG1 C1 C64 C CR R ADC VEE VSS V3 MPU VSS V5 V4 V0 V2 V1 VDD S1 S64 KS0108B Bottom view CLK2 CL2 FRM CLK1 M VSS V4 V...

Страница 6: ...matic Item Symbol Min Typ Max Unit Condition Note 2 1 Viewing Angle f 70 90 90 deg Cr 2 0 1 2 Contrast Ratio Cr 4 20 f 0 3 Response Time rise tR 110 ms 20 f 0 4 Response Time fall tF 110 ms 20 f 0 4 4...

Страница 7: ...lling edge of E when CS1B L CS2B L and CS3 H 6 E Enable signal E Description H Read data in DB 7 0 appears while E High L Display data DB 7 0 is latched at falling edge of E 7 DB0 8 DB1 9 DB2 10 DB3 1...

Страница 8: ...2 Cf 20pF 5 315 450 585 kHz On Resistance Vdiv Ci RONS VDD VEE 17V Load current 150 A 1 5 kO IDD1 Master mode 1 128 Duty 1 0 mA 3 Operating current IDD2 Master mode 1 128 Duty 0 2 4 Supply Current IE...

Страница 9: ...Unit Note Operating voltage VDD 4 5 5 5 V VIH1 0 7VDD VDD 1 Input High voltage VIH2 2 0 VDD 2 VIL1 0 0 3VD D 1 Input Low voltage VIL2 0 0 8 2 Output High Voltage VOH IOH 0 2mA 2 4 3 Output Low Voltag...

Страница 10: ...with 64 channel outputs for dot matrix liquid crystal graphic display systems This device provides 64 shift registers and 64 output drivers It generates the timing signal to control the KS0108B 64 ch...

Страница 11: ...SS FRM M CLK1 CLK2 0 7VDD 0 7VDD 0 3VDD 0 3VDD Characteristic Symbol Min Typ Max Unit Data Setup Time tSU 20 Data Hold Time tDH 40 Data Delay Time tD 5 FRM Delay Time tDF 2 2 M Delay Time tDM 2 2 CL2...

Страница 12: ...tR tSU tR tF tD tHCL 0 7VDD 0 3VDD 0 3VDD 0 7VDD tH Characteristics Symbol Min Typ Max Unit Note CL2 Low Level Width tWLC1 450 PCLK2 VSS CL2 High Level Width tWHC1 150 PCLK2 VSS CL2 Low Level Width t...

Страница 13: ...R CR C C Rf Cf open open External clock 2 Slave Mode KS0107B R CR C open open VDD 2 Timing Generation circuit It generates CL2 M FRM CLK1 and CLK2 by the frequency from oscillation circuit 1 Selection...

Страница 14: ...a on synchronization or rising edge or falling edge of the CL2 according to PCLK2 PCLK2 Phase Selection H Data shift on rising edge of CL2 L Data shift on falling edge of CL2 2 Data shift Direction Se...

Страница 15: ...lay data transferred from a 8 bit micro controller and generates the dot matrix liquid crystal driving signals corresponding to stored data The KS0108B composed of the liquid crystal display system in...

Страница 16: ...tW L1 tR tF tW H 1 tCY C LK1 C LK2 0 3VD D 0 7VD D 0 7V D D 0 3V D D 2 Display Control Timing Characteristic Symbol Min Typ Max Unit FRM Delay Time tDF 2 2 M Delay Time tDM 2 2 CL LOW Level Width tWL...

Страница 17: ...High Level Width tWH 450 E Low Level Width tWL 450 E Rise Time tR 25 E Fall Time tF 25 Address Set Up Time tASU 140 Address Hold Time tAH 10 Data Set Up Time tSU 200 Data Delay Time tD 320 Data Hold T...

Страница 18: ...e in the active mode R W and RS select the input register The data from MPU is written into input register Then writing it into display RAM Data latched for falling of the E signal and write automatic...

Страница 19: ...B is low No instruction except status read can by accepted Therefore execute other instructions after making sure that DB4 clear RSTB and DB7 0 ready by status read instruction The conditions of power...

Страница 20: ...ruction 8 Y address counter Y address counter designates address of the internal display data RAM An address is set by instruction and is increased by 1 automatically by read or write operations of di...

Страница 21: ...dress 0 63 Sets the Y address at the column address counter Set Display Start Line 0 0 1 1 Display start line 0 63 Indicates the Display Data RAM displayed at the top of the screen Set Address X addre...

Страница 22: ...tus Read RS R W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 0 BUS Y 0 ON OFF RESET 0 0 0 0 BUSY When BUSY is 1 the Chip is executing internal operation and no instructions are accepted When BUSY is 0 the Chip i...

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