3
Programming
Using the XSTOOLs Utilities with the XSUSB Board
The XSUSB Board does not significantly alter the procedures for downloading logic
designs into the FPGA and CPLD of your XSA or XSB Board or for
downloading/uploading data to/from the SDRAM and Flash devices on the board. The
only change is that you must select the USB port instead of the parallel port in the Port
pulldown list of the GUI-based XSTOOLs utilities. For the command-line-based
XSTOOLs utilities, use the option
–usb 0
to select the USB0 port.
FPGA Bitstream Generation Options When Using the XSUSB
You use the XILINX ISE software to generate the .BIT file that is downloaded to the FPGA
through the XSUSB Board. Steps for doing this are given in the XILINX documentation,
but there is one detail that is specific to using the XSUSB Board. The XSUSB Board loads
the bitstream into the FPGA through its JTAG port. In order for your FPGA designs to
startup correctly, you need to change the FPGA Start-Up Clock from CCLK to JTAG
Clock. This is done by right-clicking on the Generate Programming File item in the
Processes pane and selecting Properties... from the pop-up menu.
XSUSB INTERFACE BOARD V1.0 USER MANUAL
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