WinSystems EBC-BX, Руководство по эксплуатации

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Reg is ter De tails
Port 0-5 I/O - Each I/O bit in each of the 6 ports can be in di vidu ally pro grammed for in put or out -
put. Writ ing a '0' to a bit po si tion causes the cor re spond ing out put pin to go to a High- Impedance state
(pulled high by ex ter nal 10K ohm re sis tors). This al lows it to be used as an in put. When used in the in put
mode, a read re flects the in verted state of the I/O pin, such that a high on the pin will read as a '0' in the
reg is ter. Writ ing a '1' to a bit po si tion causes the out put pin to sink cur rent (up to 12mA), ef fec tively
pull ing it low.
INT_PEND ING - This read- only reg is ter re flects the com bined state of the INT_ID0 through
INT_ID2 reg is ters. When any of the lower 3 bits are set, it in di cates that an in ter rupt is pend ing on the
I/O port cor re spond ing to the bit po si tion(s) that are set. Read ing this reg is ter al lows an In ter rupt Serv -
ice Rou tine to quickly de ter mine if any in ter rupts are pend ing and which I/O port has a pend ing in ter -
rupt.
PAGE/LOCK - This reg is ter serves two pur poses. The up per two bits se lect the reg is ter page in use
as shown here:
D7 D6 Page
0 0 Page 0
0 1 Page 1
1 0 Page 2
1 1 Page 3
Bits 5-0 al low for lock ing the I/O ports. A '1' writ ten to the I/O port po si tion will pro hibit fur ther
writes to the cor re spond ing I/O port.
POL0- POL2 - These reg is ters are ac ces si ble when page 1 is se lected. They al low in ter rupt po lar ity
se lec tion on a port- by- port and bit- by- bit ba sis. Writ ing a '1' to a bit po si tion se lects the ris ing edge de -
tec tion in ter rupts while writ ing a '0' to a bit po si tion se lects fal ling edge de tec tion in ter rupts.
ENAB0- ENAB2 - These reg is ters are ac ces si ble when page 2 is se lected. They al low for port- by-
port and bit- by- bit ena bling of the edge de tec tion in ter rupts. When set to a '1' the edge de tec tion in ter -
rupt is en abled for the cor re spond ing port and bit. When cleared to a '0', the bit's edge de tec tion in ter rupt
is dis abled. Note that this reg is ter can be used to in di vidu ally clear a pend ing in ter rupt by dis abling and
reena bling the pend ing in ter rupt.
INT_ID0 - INT_ID2 - These reg is ters are ac ces si ble when page 3 is se lected. They are used to
iden tify cur rently pend ing edge in ter rupts. A bit when read as a '1' in di cates that an edge of the po lar ity
pro grammed into the cor re spond ing po lar ity reg is ter has been rec og nized. Note that a write to this reg -
is ter (value ig nored) clears ALL of the pend ing in ter rupts in this reg is ter.
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