WinSystems EBC-BX, Руководство по эксплуатации

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2.20 Par al lel I/O
The EBC- BX util izes the Win Sys tems WS16C48 ASIC high- density I/O chip mapped at a base ad -
dress of 120H. The first 24 lines are ca pa ble of fully latched event sens ing with sense po lar ity be ing
soft ware pro gram ma ble. Two, 50- pin con nec tors al low for easy mat ing with in dus try stan dard I/O
racks. The pin out for the two con nec tors are shown on the next page.
2.20.1 Par al lel I/O En able
The par al lel fea tures of the EBC- BX can be en abled or dis abled us ing the jumper block at J6. When
J6 is jumpered the par al lel I/O is en abled at I/O ad dress 120H. When J6 is open the 16 ad dresses start ing
at I/O ad dress 120H are free for use by other de vices.
2.20.2 Par al lel I/O VCC En able
The I/O con nec tors can pro vide +5 volts to an I/O rack or for mis cel la ne ous pur poses by jump er ing
J14. When J14 is ju5 volts is pro vided at pin 49 of both J7 and J9. It the user's re spon si bil ity to
limit cur rent to a safe value (less than 400mA ) to avoid dam ag ing the CPU board.
2.20.3 Par al lel I/O Con nec tors
The 48 lines of par al lel I/O are ter mi nated through two 50- pin con nec tors at J7 and J9. The J7 con -
nec tor han dles I/O ports 0-2 while J9 han dles ports 3-5. The pin defi ni tions for J7 and J9 are shown on
the fol low ing page.
Page 2 - 18 OPERATIONS MANUAL EBC-BX 030923
WinSystems - "The Embedded Systems Authority"
2 1
o o
J6
2 1
o o
J14
J6 Par al lel I/O En able
J14 Par al lel I/O +5V Supply Enable