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AtomicOp Egress Blocking
If supported by hardware and set to 'Enabled', outbound AtomicOp Requests via
Egress Ports will be blocked.
IDO Request Enable
If supported by hardware and set too 'Enabled', this permits setting the number of
ID-Based Ordering (IDO)) bit (Attribute[2]) requests to be initiated.
IDO Completion Enable
If supported by hardware and set too 'Enabled', this permits setting the number of
ID-Based Ordering (IDO)) bit (Attribute[2]) requests to be initiated.
LTRR Mechanism Enable
If supported by hardware and set too 'Enabled', this enables the Latency Tolerance
Reporting (LTRR) Mechanism.
End-End TLP Prefix Blocking
If supported by hardware and set too 'Enabled', this function will block forwarding of
TLPs containing End-End TLP Prefixes.
4.4.2.2 PCI Express GEN2 Link Register Settings
Target Link Speed
If supported by hardware and set too 'Force to 22.5 GT/s' for Downstream Ports, this
sets an upper limit on Link operational speed by restricting the values advertised by
the Upstream component in its training sequences. When 'Auto' is selected HW
initialized data will be used.
Clock Power Management
If supported by hardware and sett to 'Enabled', the device is permitted
to use CLKKREQ# signal for power management of Link clock in
accordance to protocol defined in appropriate form factor specification.
Compliance SOS
If supported by hardware and set to 'Enabled', this will force LTSS SM to send SKP
Ordered Sets between sequences when sending Compliance Pattern or Modified
Содержание PL-80150
Страница 10: ...1 6 System Layout Front Panel Features Rear panel features...
Страница 11: ...1 7 Dimensions...
Страница 15: ...Pin Define 1 GND 2 PS_ON CN9 10 CPU SMART FFAN Pin Definition 1 GND 2 12V 3 Speed Detect 4 Control...
Страница 16: ...SW1 SW2 CPU ID Pin Setting B C CPU0 1 CB 96550 2 22 R285 Connector Jumper Location and Definition...
Страница 32: ...7 N A 8 IO...
Страница 53: ...CN33 to CN10 Fans Speed...
Страница 55: ......
Страница 56: ...4 4 6 Super IO Configuration...
Страница 58: ...4 4 6 2 Console Redirection Settings COM0...
Страница 59: ...Console Redirection Console Redirection Enable or Disable...
Страница 64: ......
Страница 71: ......
Страница 72: ......
Страница 73: ...4 5 4 Chipset South Bridge...
Страница 75: ...PCI Express Port 1 5 6 7 8 Enabled Disabled the PCI Express Ports in the Chipset...
Страница 76: ...EHCCI Controller Enabled Disabled USB 2 0 EHCI S Support USB Port 0 1 2 3 Enabled Disabled All USBB Devices...
Страница 78: ...4 7 Boot...
Страница 86: ......