ViewSonic VG1921wm-2, Руководство по обслуживанию

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ViewSonic Corporation
Confidential - Do Not Copy
VG1921wm-2
23
53 MODE[1] I Chip Configuration Input
54 LVA3P O A-Link Positive LVDS Differential Data Output
55 LVA3M O A-Link Negative LVDS Differential Data Output
56 VDDP I Digital Output Power
57 GND Ground
58 LVACKP O A-Link Positive LVDS Differential Clock Output
59 LVACKM O A-Link Negative LVDS Differential Clock Output
60 LVA2P O A-Link Positive LVDS Differential Data Output
61 LVA2M O A-Link Negative LVDS Differential Data Output
62 LVA1P O A-Link Positive LVDS Differential Data Output
63 LVA1M O A-Link Negative LVDS Differential Data Output
64 LVA0P O A-Link Positive LVDS Differential Data Output
65 LVA0M O A-Link Negative LVDS Differential Data Output
66 VDDC I Digital Core Power
67 LVB3P O B-Link Positive LVDS Differential Data Output
68 LVB3M O B-Link Negative LVDS Differential Data Output
69 LVBCKP O B-Link Positive LVDS Differential Clock Output
70 LVBCKM O B-Link Negative LVDS Differential Clock Output
71 LVB2P O B-Link Positive LVDS Differential Data Output
72 LVB2M O B-Link Negative LVDS Differential Data Output
73 LVB1P O B-Link Positive LVDS Differential Data Output
74 LVB1M O B-Link Negative LVDS Differential Data Output
75 VDDP I Digital Output Power
76 GND Ground
77 LVB0P O B-Link Positive LVDS Differential Data Output
78 LVB0M O B-Link Negative LVDS Differential Data Output
79 GND Ground
80 BYPASS For External Bypass Capacitor
81 NC Not connected
82 VDDC I Digital Core Power
83 GND Ground
84 RST I Chip Reset; High Reset
85 GPIO_P12 I/O General Purpose Input/Output; 4mA driving strength
86 PWM1/GPIO_P25 I/O
Pulse Width Modulation Output; 4mA driving
strength/General Purpose Input/Output; 4mA driving
strength
87 RSTN I Chip Reset; Low Reset
88 GPIO_P00/SAR1 I/O
General Purpose Input/Output; 4mA driving
strength/SAR ADC Input
89 GPIO_P01/SAR2 I/O
General Purpose Input/Output; 4mA driving
strength/SAR ADC Input