ViewSonic VA902-3, Руководство по обслуживанию

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ViewSonic Corporation
Confidential - Do Not Copy
VA902-3_VA902b-3
4. Circuit Description
A.
Scaling controller 
GENERAL DESCRIPTION
The TSU16AS is total solution graphics processing IC for LCD monitors with panel
resolutions up to SXGA. It is configured with a high-speed integrated triple-ADC/PLL, a high
quality display processing engine, and an integrated output display interface that can support
LVDS panel interface format. To further reduce system costs, the TSU16AS also integrates
intelligent power management control capability for green-mode requirements and
spread-spectrum support for EMI management.
The TSU16AS incorporates the world’s first coherent overs ampled RGB graphics ADC in a
monitor controller system1. The overs ampling ADC samples the input RGB signals at a
frequency that is much higher than the signal source pixel rate. This can preserve details in the
video signal that ordinarily would be lost due to input signal jitter or bandwidth limitations in
non-overs ampled systems.
The TSU16AS also incorporates a new Dynamic Frame Rate (DFR) generator2 for the digital
output video to the display panel that preserves the advantages of a fixed output clock rate,
while eliminating the output end of frame short-line.
1,2 Patent Pending
PIN DESCRIPTION
CPU Interface
Pin Name Pin Type Function Pin
HWRESET Schmitt Trigger Input w/
5V-tolerant
Hardware reset; active high 5
INT Output CPU interrupt; 4mA driving strength 27
AD3 I/O w/ 5V-tolerant DDR direct bus AD3; 4mA driving strength 4
AD2 I/O w/ 5V-tolerant DDR direct bus AD2; 4mA driving strength 1
AD1 I/O w/ 5V-tolerant DDR direct bus AD1; 4mA driving strength 2
AD0 I/O w/ 5V-tolerant DDR direct bus AD0; 4mA driving strength 3
ALE I w/ 5V-tolerant DDR direct bus ALE; active high 24
WRZ I w/ 5V-tolerant DDR direct bus WRZ; active low 25
RDZ I w/ 5V-tolerant DDR direct bus RDZ; active low 26
Analog Interface
Pin Name Pin Type Function Pin
HSYNC Schmitt Trigger Input w/
5V-tolerant
Analog HSYNC input 8
VSYNC Schmitt Trigger Input w/
5V-tolerant
Analog VSYNC input 9
REFP Internal ADC top de-coupling pin 22
REFM Internal ADC bottom de-coupling pin 23
RINP Analog Input Analog red input 19
RINM Analog Input Reference ground for analog red input 18
SOGIN Analog Input Sync-on-green input 17
GINP Analog Input Analog green input 16
GINM Analog Input Reference ground for analog green input 15
BINP Analog Input Analog blue input 14
BINM Analog Input Reference ground for analog blue input 13
REXT External resistor 390 ohm to AVDD_ADC 11
LVDS Interface
Pin Name Pin Type Function Pin
LVA0M Output A-Link Negative LVDS Differential Data Output 42
LVA0P Output A-Link Positive LVDS Differential Data Output 41
LVA1M Output A-Link Negative LVDS Differential Data Output 40
TSU16AS
SXGA LCD Controller with Analog Interface and Dual LVDS Transmitter
Preliminary Data Sheet Version 0.2
Version 0.2 - 5 - 10/1/2004
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