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The standard MX29LV160T/B & MX29LV160AT/AB offers access time as fast as 70ns, allowing operation of high-speed
microprocessors without wait states. To eliminate bus contention, the MX29LV160T/B &MX29LV160AT/AB has separate
chip enable (CE) and output enable (OE) controls.
MXIC's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming. The
MX29LV160T/B & MX29LV160AT/AB uses a command register to manage this functionality. The command register
allows for 100% TTL level control inputs and fixed power supply levels during erase and programming, while maintaining
maximum EPROM compatibility.
MXIC Flash technology reliably stores memory contents even after 100,000 erase and program cycles. The MXIC cell is
designed to optimize the erase and programming mechanisms. In addition, the combination of advanced tunnel oxide
processing and low internal electric fields for erase and program operations produces reliable cycling. The
MX29LV160T/B & MX29LV160AT/AB uses a 2.7V~3.6V VCC supply to perform the High Reliability Erase and auto
Program/Erase algorithms.
The highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process. Latch-up protection is
proved for stresses up to 100 milliamps on address and data pin from -1V to VCC + 1V.
17.7.2. Features
•
Extended single - supply voltage range 2.7V to 3.6V
•
2,097,152 x 8/1,048,576 x 16 switchable
•
Single power supply operation
•
Fast access time: 70/90ns
•
Low power consumption
•
Command register architecture
•
Auto Erase (chip & sector) and Auto Program
•
Erase Suspend/Erase Resume
•
Status
Reply
•
Ready/Busy pin (RY/BY)
•
Sector
protection
•
CFI (Common Flash Interface) compliant (for MX29LV160AT/AB)
•
100,000 minimum erase/program cycles
•
Latch-up protected to 100mA from -1V to VCC+1V
•
Boot
Sector
Architecture
•
Low VCC write inhibit is equal to or less than 1.4V
•
Compatibility with JEDEC standard
17.7.3. Pin
Description
17.8. 24C32
17.8.1. General
Description
The AT24C32/64 provides 32,768/65,536 bits of serial electrically erasable and programmable read only
memory (EEPROM) organized as 4096/8192 words of 8 bits each. The device’s cascadable feature allows up to
8 devices to share a common 2-wire bus. The device is optimized for use in many industrial and commercial
applications where low power and low voltage operation are essential. The AT24C32/64 is available in space
saving 8-pin JEDEC PDIP, 8-pin JEDEC SOIC, 8-pin EIAJ SOIC, and 8-pin TSSOP (AT24C64) packages and is
accessed via a 2-wire serial interface. In addition, the entire family is available in 2.7V (2.7V to 5.5V) and 1.8V
(1.8V to 5.5V) versions
.
Содержание 17MB15E-5
Страница 1: ...i 42 PLASMA TV 17MB15E 5 SERVICE MANUAL ...
Страница 38: ...33 15 27 3 Pinning ...
Страница 54: ...49 ...
Страница 59: ...54 ...
Страница 60: ...55 ...
Страница 61: ...56 ...
Страница 62: ...57 18 APPENDIX A 18 1 EXPLODED VIEW AND PART LIST ...
Страница 64: ...59 19 2 16 ELECTRICALDIAGRAMS 19 2 1 POWER BOARD ...
Страница 65: ...60 ...
Страница 66: ...61 ...
Страница 67: ...62 ...
Страница 68: ......
Страница 80: ...73 19 4 PRINT_LAY OUTS 19 4 1 Complete_PCB_Pattern_Schematic ...
Страница 81: ...74 19 4 3 In 1_Ground_Level_PCB_Pattern ...
Страница 82: ...75 19 4 4 In2_Power_Level_PCB_Patter ...
Страница 83: ...76 19 4 5 Bottom_ Level_ PCB_ Pattern ...
Страница 84: ...77 19 4 6 Top_Layer_Silk_Print ...
Страница 85: ...78 19 4 7 Bottom_Layer_Silk_Print ...
Страница 86: ...79 19 4 8 Topmask lgx ...
Страница 87: ......
Страница 88: ...81 19 4 10 17fav15 2pcb ...
Страница 89: ...82 19 4 11 18amp05 2 pcb ...