Interfaces and Connectors
VL-EPU-2610 Reference Manual
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microSD Sockets
The Falcon provides two microSD sockets, one on the CPU board (J2) and one on the baseboard
(J10). The VL-F41 series of microSD cards provide solid-state storage of 2 GB, 4 GB, or 8 GB.
The microSD sockets will accommodate cards with up to 32 GB of storage capacity.
USB Interface
The Falcon provides four USB 2.0 ports.
The USB interface on the Falcon is UHCI (Universal Host Controller Interface) and EHCI
(Enhanced Host Controller Interface) compatible, which provides a common industry
software/hardware interface. The Falcon provides dual Type-A USB host connectors at locations
J1 and J7 on the VL-CBR-5013/5014 paddleboard. One more USB channel is available through
the Mini PCIe card connector at J7.
Serial Ports
The Falcon features four on-board 16550-based serial communications channels located at
standard PC I/O addresses. All ports can be operated in RS-232, RS-422, or RS-485 modes. Only
COM1 provides RS-232 handshake signals. IRQ lines are chosen in CMOS Setup. COM ports
can share interrupts with other COM ports, but not with other devices. The UARTs on the Falcon
use a 48 MHz clock and the OS should configure the clock rate in the UART Driver and
UARTClock in the Packet Hub Driver for proper functionality.
COM
P
ORT
C
ONFIGURATION
Jumper block V2 is used to configure serial ports for RS-232 or RS-422/485 operation. See
“Jumper Summary” for details. The termination resistor should be enabled for RS-422 and RS-
485 endpoint stations. Termination is not used for RS-232 and RS-485 intermediate stations.
If RS-485 mode is used, the differential twisted pair (TxD+/RxD+ and TxD-/RxD-) is formed by
connecting both transmit and receive pairs together. For example, on VL-CBR-5013 connectors
J6 and J5, the TxD+/RxD+ signal is formed by connecting pins 3 and 5, and the TxD-/RxD-
signal is formed by connecting pins 2 and 4.
RS-485
M
ODE
L
INE
D
RIVER
C
ONTROL
The TxD+/TxD– differential line driver is automatically turned on and off based on data
availability in the UART output FIFO.