EPM-32 Reference Manual
45
System Resources and Maps
Memory and I/O Map
M
EMORY
M
AP
The lower 1 MB memory map of the EPM-32 is arranged as shown in the following table.
Various blocks of memory space between C0000h and FFFFFh can be shadowed. The CMOS
setup is used to enable or disable this feature.
Table 16: Memory Map
Start
Address
End
Address
Comment
E0000h
FFFFFh
System BIOS
D0000h
DFFFFh
PC/104
C0000h
CFFFFh
Video BIOS
A0000h
BFFFFh
Video RAM
00000h
9FFFFh
System RAM
I/O
M
AP
The following table lists the I/O devices in the EPM-32 I/O map. The I/O space range for the
EPM-32 is 000h to 3FFh (10-bit decoding). User I/O devices should be added with care to avoid
the devices already in the map as shown in the following table.
Table 17: On-Board I/O Devices
I/O Device
Standard
I/O Addresses
Alternate *
I/O Addresses
Super I/O
02Eh
– 02Fh
Secondary Hard Drive Controller
170h
– 177h
Special Control Register
1D0h
1E0h
Watchdog Hold-Off Register
1D1h
1E1h
Jumper and Status Register
1D2h
1E2h
Primary Hard Drive Controller
1F0h
– 1F7h
COM2 Serial Port
2F8h
– 2FFh
LPT1 Parallel Port
378h
– 37Fh
SVGA Video
3B0h
– 3DFh
Floppy Disk Controller
3F0h
– 3F7h
COM1 Serial Port
3F8h
– 3FFh
*
User selectable via CMOS Setup
Note:
The I/O ports occupied by on-board devices are freed up when the device is
disabled in the CMOS setup.
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