©
V
elle
m
an
11
HP
S
40 T
e
ch
ni
cal D
o
c
Title
Number
Revision
Size
A4
Date:
3-Oct-2002
Sheet of
File:
C:\Files\Ontwerp\hps40\diagram & pcb\HPS40 ed4.ddb
Drawn By:
RA0/AN0
3
RA1/AN1
4
RA2/AN2/VREF-
5
RA3/AN3/VREF+
6
RA4/T0CKI
7
RA5/SS/LVDIN
8
RB0/INT0
36
RB4
41
RB2/INT2
38
RB3/CCP2
39
RB1/INT1
37
RB5
42
RB6
43
RB7
44
RC0/T1OSO/T1CKI
16
RC1/T1OSI/CCP2
18
RC2/CCP1
19
RC3/SCK/SCL
20
RC4/SDI/SDA
25
RC5/SDO
26
RC6/TX/CK
27
RC7/RX/DT
29
RD0/PSP0
21
RD1/PSP1
22
RD2/PSP2
23
RD3/PSP3
24
RD4/PSP4
30
RD5/PSP5
31
RD6/PSP6
32
RD7/PSP7
33
RE0/RD/AN5
9
RE1/WR/AN6
10
RE2/CS/AN7
11
VS
S
13
VS
S
34
MCLR/VPP
2
OSC1/CLKIN
14
OSC2/CLKOUT/RA6
15
NC
1
NC
17
NC
28
NC
40
VD
D
12
VD
D
35
IC12
PIC18C452/L(44)
DB0
7
DB1
8
DB2
9
DB3
10
DB4
11
DB5
12
DB6
13
DB7
14
E
6
R/W
5
RS
4
CS
15
RES
16
VS
S
1
VD
D
2
VE
E
17
CO
N
T
R
A
S
T
3
A
19
K
20
LCD1
LCD-PS192112
PWM CONTRAST
DGND
X1
32.768KHz
DGND
DGND
DGND
TRIG INT
PWM YPOS
SW8
Contrast
SW12
Hold
SW16
Display
SW4
Mark
ZD3
PLVA2656A
ZD4
PLVA2656A
DGND
DGND
SW7
Up
SW11
Left
SW15
Input
SW3
Trig
SW6
Right
SW10
Down
SW14
Auto
SW2
tVdiv
SW5
ProbeX1
SW9
Meter
SW13
On/Off
SW1
XYpos
VPP
1
VDD
2
GND
3
DATA
4
CLK
5
SK5
ICSP CONNECTOR
DGND
RB6
RB7
RB6
RB7
ZD5
PLVA2656A
ZD6
PLVA2656A
DGND
DGND
R40
10K
D8
BAS85
SW17
RESET
DGND
DGND
3
2
6
7
4
1
5
IC13
UA741
R75
150K
R61
47K
R60
47K
R73
82K
R76
330K
C36
470n
C37
470n
DGND
DGND
PWM CONTRAST
-17.5V
-17.5V
5VD
R17
15
R28
2K2
DGND
T1
PMBT2222A
BACKLIGHT
5VD
DGND
5VD
R62
47K
DGND
HPS40
HPS40 Digital section
SK3
PHONEJACK STEREO SW
1
2
6
5
7
IC14
IL211AT
R18
150
R27
3K3
5VD
RTS
Rx
Tx
AD CLK
AD OE
PWR
RD TRIGTIME
DISABLE SYNC
TRIG LE
INPUT LE
BACKLIGHT
R43
10K
VC
C
4
OUT
3
TRI
1
GN
D
2
XO1
40MHz
DGND
DGND
IO
1
IO
2
IO
3
IO
4
IO/GCK1
5
IO/GCK2
6
IO/GCK3
7
IO
8
IO
9
GN
D
10
IO
11
IO
12
IO
13
IO
14
TD IN
15
TMS
16
TCK
17
IO
18
IO
19
IO
20
VC
C
I
N
T
21
IO
22
GN
D
23
IO
24
IO
25
IO
26
IO
27
IO
28
IO
29
TD OUT
30
GN
D
31
VC
C
I
O
32
IO
33
IO
34
IO
35
IO
36
IO
37
IO
38
IO/GSR
39
IO/GTS2
40
VC
C
I
N
T
41
IO/GTS1
42
IO
43
IO
44
IC11
XC9536XL-10PC44C
DGND
3.3VD
INPUT LE
TRIG LE
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
RD TRIGTIME
DISABLE SYNC
DGND DGND DGND
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB0
RS232 Tx
RS232 Tx
TRIG2
TRIG1
TRIG0
REF GND
AC/DC
÷1
÷20
÷400
x1.415/x7.07
x3.325/x6.65
OSC
OSC
R26
270
VCC
1
GND
2
NC
3
TCK
4
NC
5
TDO
6
TDI
7
NC
8
TMS
9
SK6
JTAG CPLD CONNECTOR
DGND
3.3Vcpld
TMS
TDI
TDO
TCK
TDO
TDI
TMS
TCK
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
SK7
PROBETESTPOINT
INPUT CAP1
INPUT CAP2
C57
100µ/16V
DGND
DGND
C47
100µ/16V
DGND
RESET
R54
10K
R55
10K
R56
10K
R53
10K
5VD
TRIGGER
TRIG INT
R52
10K
4.5Vcpu
4.0
C59
470p
C60
470p
C61
470p
C62
470p
C63
470p
C64
470p
C65
470p
C66
470p
C67
470p
C68
470p
AGNDAGNDAGNDAGNDAGNDAGNDAGNDAGNDAGNDAGND
R80
47
R81
47
R82
47
R83
47
R84
47
R85
47
R86
47
R87
47
R88
47
R89
47
R79
47
C69
470p
AGND
C70
470p
AGND
R90
47
C26
100n
C13
10n
C21
100n
C22
100n
C23
100n
C24
100n
C25
100n
C9
33p
C8
33p
3
4
Eddy De Cocker
R92
33K
L6
0.68µH
L7
0.68µH
3.3Vcpld
C77
1n
DGND
4.5Vcpu
4.5Vcpu
* R76 = 390K for lcd with negatif power supply on board
