UC-00-M31 EN P1.0.0
Introduction
5
1.3
Block Diagram
UM982
SAW
Filter
CLOCK
SAW
Filter
TCXO
ANT2_PWR
RESET_N
EVENT
PPS
UART3
I
2
C
UART2
UART1
RTK_STAT
SPIS
LNA
LNA
ANT2_IN
ANT1_IN
PVT_STAT
ERR_STAT
Nebulas IV
GNSS
RF
GNSS
BB
Interface
PMU
ANT1_PWR
Figure 1-2 UM982 Block Diagram
RF Part
The receiver gets filtered and enhanced GNSS signal from the antenna via a coaxial
cable. The RF part converts the RF input signals into the IF signals, and converts IF
analog signals into digital signals required for NebulasIV
TM
chip (UC9810).
NebulasIV
TM
SoC (UC9810)
NebulasIV (UC9810) is UNICORECOMM’s new generation high precision GNSS SoC with
22 nm low power design, supporting all constellations, multiple frequencies, and 1408
super channels. It integrates a 2 GHz dual-core CPU, a high speed floating point
processor and an RTK co-processor, which can fulfill the high precision baseband
processing and RTK positioning/heading independently.
1PPS
UM982 outputs 1 PPS with adjustable pulse width and polarity.
Event
UM982 provides the Event Mark Input with adjustable frequency and polarity.
