ZED-F9P - Integration Manual
UBX-18010802 - R01
2 Hardware description
Page 31 of 64
Objective Specification - Confidential
2.3.4 RESET_N interface
The ZED-F9P high precision receiver provides a RESET_N pin to reset the system. The RESET_N pin
is an input-only pin with an internal pull-up resistor. It is recommended that if a Reset is required that
this input be pulled to a low level for at least 100 ms. This is to ensure that an input Reset is detected
on the RESET_N pin. Please leave the RESET_N pin open for normal operation. The RESET_N input
complies with the V_IO level and can be actively driven high.
2.3.5 SAFEBOOT_N interface
The ZED-F9P high precision receiver provides a SAFEBOOT_N pin that is used to command the
receiver into SAFEBOOT. If this pin is low at start up, the receiver starts in Safe Boot Mode and
does not begin GNSS operation. In Safe Boot Mode the receiver runs from an internal LC oscillator.
Thus it can be used to recover from situations where the SQI Flash has become corrupted. Owing
to the inaccurate frequency of the internal LC oscillator, the receiver is unable to communicate via
USB in Safe Boot Mode. For communication by UART in Safe Boot Mode, a training sequence (0x 55
55 at 9600 baud) can be sent by the host to the receiver in order to enable communication. After
sending the training sequence the host has to wait for at least 2 ms before sending messages to the
receiver. Safe Boot Mode is used in production to program the SQI Flash and to set the Low Level
Configuration in the eFuse. It is recommended to have the possibility to pull the SAFEBOOT_N pin
low when the receiver starts up. This can be provided using an externally connected test point or
via a host CPUs digital I/O port.
2.3.6 TIMEPULSE interface
The ZED-F9P high precision receiver provides a time pulse on the TIMEPULSE pin.
2.3.7 TX_READY interface
The TX_READY function is used to indicate when the receiver has data to transmit. A listener
can wait on the TX_READY signal instead of polling the DDC or SPI interfaces. The UBX-CFG-PRT
message lets you configure the polarity and the number of bytes in the buffer before the TX READY
signal goes active. The TX_READY function is disabled by default.
2.3.8 USB debug interface
The debug interface is compatible with the USB version 2.0 FS (Full Speed, 12 Mb/s) interface. This
interface does not support firmware update.
Please contact u-blox support for information on drivers as these are not released.
USB suspend is not supported.
USB bus powered is not supported.
Pin 38, V_USB needs to be connected to the module VCC. Pin 39 is USB_DM. Pin 48 is USB_DP. 27
Ω
resistors are required in line with the USB_DM and USB_DP lines.
