SARA-G3 and SARA-U2 series - System Integration Manual
UBX-13000995 - R08
Objective Specification
Design-in
Page 113 of 188
Limit capacitance and series resistance on each SIM signal (
SIM_CLK
,
SIM_IO
,
SIM_RST
) to match the
requirements for the SIM interface (27.7 ns is the maximum allowed rise time on the
SIM_CLK
line, 1.0 µs is
the maximum allowed rise time on the
SIM_IO
and
SIM_RST
lines)
SARA-G3 / SARA-U2
C1
FIRST
SIM CARD
VPP (C6)
VCC (C1)
IO (C7)
CLK (C3)
RST (C2)
GND (C5)
C2 C3
C5
J1
C4
D1 D2 D3 D4
GND
U1
41
VSIM
VSIM
1VSIM
2VSIM
VCC
C11
4PDT
Analog
Switch
3V8
39
SIM_IO
DAT
1DAT
2DAT
38
SIM_CLK
CLK
1CLK
2CLK
40
SIM_RST
RST
1RST
2RST
SEL
SECOND
SIM CARD
VPP (C6)
VCC (C1)
IO (C7)
CLK (C3)
RST (C2)
GND (C5)
J2
C6 C7 C8
C10
C9
D5 D6 D7 D8
Application
Processor
GPIO
R1
Figure 57: Application circuit for the connection to two removable SIM cards, with SIM detection implemented
Reference
Description
Part Number - Manufacturer
C1
–
C4, C6
–
C9
33 pF Capacitor Ceramic C0G 0402 5% 25 V
GRM1555C1H330JZ01 - Murata
C5, C10, C11
100 nF Capacitor Ceramic X7R 0402 10% 16 V
GRM155R71C104KA01 - Murata
D1
–
D8
Very Low Capacitance ESD Protection
PESD0402-140 - Tyco Electronics
R1
47 k
Ω
Resistor 0402 5% 0.1 W
RC0402JR-0747KL- Yageo Phycomp
J1, J2
SIM Card Holder
6 positions, without card presence switch
Various Manufacturers,
C707 10M006 136 2 - Amphenol
U1
4PDT Analog Switch,
with Low On-Capacitance and Low On-Resistance
FSA2567 - Fairchild Semiconductor
Table 30: Example of components for the connection to two removable SIM cards, with SIM detection implemented
2.5.1.2
Guidelines for SIM layout design
The layout of the SIM card interface lines (
VSIM
,
SIM_CLK
,
SIM_IO
,
SIM_RST
) may be critical if the SIM card is
placed far away from the SARA-G3 and SARA-U2 series modules or in close proximity to the RF antenna: these
two cases should be avoided or at least mitigated as described below.
In the first case, the long connection can cause the radiation of some harmonics of the digital data frequency as
any other digital interface: keep the traces short and avoid coupling with RF line or sensitive analog inputs.
In the second case, the same harmonics can be picked up and create self-interference that can reduce the
sensitivity of GSM / UMTS receiver channels whose carrier frequency is coincidental with harmonic frequencies:
placing the RF bypass capacitors suggested in Figure 56 near the SIM connector will mitigate the problem.
In addition, since the SIM card is typically accessed by the end user, it can be subjected to ESD discharges: add
adequate ESD protection as suggested in Figure 56 to protect module SIM pins near the SIM connector.
Limit capacitance and series resistance on each SIM signal to match the SIM specifications: the connections
should always be kept as short as possible.
Avoid coupling with any sensitive analog circuit, since the SIM signals can cause the radiation of some harmonics
of the digital data frequency
