NINA-B2 series - System Integration Manual
UBX-18011096 - R03
Contents
Page 8 of 30
Pin
State during boot
Default
Behavior
Description
36
0
VDD_SDIO=
3.3V
Voltage of Internal
Flash
1
10
k
Ω
pull-up
VDD_SDIO=1
.8V
(
VDD_SDIO
should always be 1.8 V)
27, 25
00
Download Boot
Booting Mode, see
section 2 for
information about
software upgrade.
01
Reserved, do not use
10
Pull-up
*
, Pull-down
*
Normal Boot from internal Flash
11
Normal Boot from internal Flash
32
0
Silent
Debugging Log on
U0TXD during booting
1
Pull-up
*
U0TXD Toggling
32, 28
00
Falling-edge input, falling-edge output
Timing of SDIO Slave
01
Falling-edge input, rising-edge output
10
Rising-edge input, falling-edge output
11
Pull-up
*
, Pull-up
*
Rising-edge input, rising-edge output
* About 30 k
Ω
Table 2: NINA-B2 series boot strapping pins
1.7
Serial Interfaces
1.7.1
Universal asynchronous serial interface (UART)
The NINA-B2 series module provides a Universal Asynchronous Serial Interface (UART) for data
communication. The following UART signals are available:
•
Data lines (RXD as input, TXD as output)
•
Hardware flow control lines (CTS as input, RTS as output)
•
DSR and DTS are used to set and indicate the system modes
The UART can be used as 4-wire UART with hardware flow control and 2-wire UART with only
TXD
and
RXD
.
If the UART is used in 2-wire mode,
CTS
should be connected to the GND on the NINA-B2 module.
The UART interface is also be used for firmware upgrade. See the Software section for more
information.
The u-blox connectivity software adds the
DSR
and
DTR
pins to the UART interface. These pins are
not used as originally intended, but to control the state of the NINA module. Depending on the
current configuration, the
DSR
can be used to:
•
Enter command mode
•
Disconnect and/or toggle connectable status
•
Enable/disable the rest of the UART interface
•
Enter/wake up from the sleep mode
The functionality of the
DSR
and
DTR
pins are configured by AT commands. See the u-blox Short
Range Modules AT commands manual [1] for more information.
See NINA-B2 series Data Sheet [2] for characteristic information about the UART interface.
Interface
Default configuration
UART interface
115200 baud, 8 data bits, no parity, 1 stop bit, hardware flow control
Table 3: Default settings for the UART port while using the u-blox connectivity software
It is recommended to make the UART available either as test points or connected to a header for
firmware upgrade.
The IO level of the UART will follow the
VCC_IO
.