ANNA-B4 series - System integration manual
UBX-21000517 - R03
Contents
Page 27 of 74
C1-Public
The overall DC/DC efficiency of an SMPS depends on the current consumption during the active and
idle states of the specific application. Although some DC/DC converters provide high efficiency with
extremely light loads, their efficiency typically worsens when idle current drops below a few mA and
reduces the battery life.
As a contingency against “latch up”, include an ov
er-current limiter to protect the module from
electrical over stress (EOS). An LDO or SMPS will serve this purpose.
3.4.1.1
Battery
In battery powered devices ensure that the battery capacity match the application and that it can
deliver the peak current required by the module.
For further information about current consumption and other performance data, see also the
electrical specifications provided in the respective data sheet
3.5
GND pins
Good connection of the module GND pins, with a solid ground layer on the main PCB, is required for
module stability and correct RF performance. A good ground connection significantly reduces EMC
issues and provides a thermal heat sink for the module.
3.6
General layout guidelines
Best schematic and layout practices are described in this section.
Considerations for schematic design and PCB floor-planning
•
Low frequency signals are generally not critical to the layout and designers should focus on the
higher speed buses. One exception to this general rule is when high impedance traces, such as
signals driven by weak pull resistors, might be affected by crosstalk. For these and similar traces,
a supplementary isolation of 4w (four times the line width) from other buses is recommended.
•
Verify which interface bus requires termination and add series resistor terminations to these
buses.
•
Carefully consider the placement of the module with respect to antenna position and host
processor.
•
Verify the controlled impedance dimensions of the selected PCB stack-up. The PCB manufacturer
might be able to provide test coupons.
•
Verify that the power supply design and power sequence are compliant with module specifications,
as described in the
module’s
data sheet.
⚠
Take particular care not to place components close to the antenna area and follow the
recommendations from the antenna manufacturer to determine the safe distance between the
antenna and any other part of the system. Designers should also maximize the distance between
the antenna and high-frequency buses, like DDRs and related components, or consider the use of
an optional metal shield to reduce the potential interference picked up by the module antenna.
Layout and manufacturing
•
An optimized module placement provides for better RF performance.
•
Bypass capacitors should be placed as close as possible to the module. Prioritize the placement of
capacitors with the least capacitance so that these are closest to module pads. The supply rails
must be routed through the capacitors from the power supply to the supply pad on the module.
•
Avoid stubs and through-hole vias on high-speed signals which might adversely affect signal
quality.