NEO-D9C - Integration manual
Figure 21: NEO-D9C antenna bias inductor impedance
A recommended circuit design for an active antenna bias is shown below. This example shows an
external voltage of 3.3 V with current limiting as described above. An ESD protection diode should
also be connected to the input as shown.
Figure 22: NEO-D9C reference design for antenna bias
L1: Murata LQG15HS47NJ02 0402 47 N 5% 0.30 A -55/+125 C
D1: TYCO, 0.25PF, PESD0402-140 -55/+125C
C3: Murata GRM155R61A104KA01 CER X5R 0402 100N 10% 10V
R2: RES THICK FILM CHIP 1206 10R 5% 0.25W
UBX-21031631 - R02
4 Design
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