TTI TG501, Руководство по обслуживанию

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When the symmetry button is depressed the short across VR8 is removed and the total resistance
between Q1 and Q2 emitters is increased from R to 10R. This lowers the current through this
resistor chain by a factor of 10 and so the frequency is divided by 10. Rotating VR8 imbalances the
current through Q1 and Q2 to give a duty cycle of up to 1:19 or 19:1.
With the symmetry button out, the waveform symmetry is set by VR9 at the top of dial (5.0). At the
bottom of the dail, symmetry is determined by offsets on ICs 1-6 (refer to calibration procedure).
Current source IC8 tracks the I+ current source IC5 and IC9 mirrors this to become -2I+. The -2I+
current is used to clamp the waveform in the Trig and Gate modes. The ramp can only stop in the
upward direction. When the Q output
of IC14b is set low, D1 is off. If the voltage at Q5 emitter is 0V (= to 0o), the voltage on the range
capacitor will ramp up and stop at 0V. When clamped the I+ current from the diode bridge flows
through the diode between pins 4 and 3 into the -2I+ current sink. A current equivalent to I+ also
flows through the diode between pins 9 and 1 into the -2I+ current sink to total 2I+. IC7 and Q5
buffer the voltage on the Start/Stop Phase control VR11 to give a low impedance voltage source on
pin 9 of IC10. This voltage can be varied between approxi/-1.2V by VR11 corresponding to
the triangle peaks, /-90o of phase control. To release the clamp the Q output of IC14b is set
high which pulls the -2I+ current sink high via D1, reverse biasing the two clamp diodes.
Waveform Generation - range selection and triangle amplifier
Range selection is by seven push-button switches, which steer the current sources into the
appropriate multiplier capacitor. The lower four ranges use the same range capacitor C9; the lower
three ranges use a capacitance multiplier. The capacitance multiplier steals current from the range
capacitor via R36. The amount of current taken is determined by the gain setting resistors R28,
R30 or R31 for the x100, x10 and x1 ranges respectively. The triangle wave on C9 is connected to
the non-inverting inputs of IC11 and IC12. The triangle wave is amplified by IC11 which has a gain
of 3; this is trimmed by VR15 to set the overall gain of the capacitance multiplier. Q8 and Q9 buffer
the output of IC12.
The triangle buffer consists of a FET source follower Q10 with temperature compensation provided
by current source Q11, which is IDSS matched with Q10. Q13 and Q14 are emitter followers to
provide 2 low impedance outputs. Q12 is strapped as a diode and compensates for the VBEs of
Q13 and Q14. VR17 trims the DC offset in this stage.
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