Trenz Electronic TE0720, Схемы

Страница: 3 / 15

1
1
2
2
3
3
4
4
D D
C C
B B
A A
Date: Page 3 of 15
Number:
Title:
GigaZee - B0
03
Rev.
A4
Copyright: 2013 Trenz Electronic GmbH
FPGA-MISC.SchDoc
Filename:
2015-10-12
TE0720-L1IF
TE0720
DONE_0
T12
DXP_0
N11
GNDADC_0
K12
VCCADC_0
K11
VREFP_0
M11
VN_0
M12
VCCBATT_0
G9
TCK_0
G11
DXN_0
N12
VREFN_0
L12
VP_0
L11
RSVDGND
G10
RSVDVCC
T10
RSVDVCC
T8
INIT_B_0
T14
TDI_0
H13
TDO_0
G14
RSVDVCC
T7
CFGBVS_0
T13
PROGRAM_B_0
T11
TMS_0
G12
VCCO_0
R12
U5H
XC7Z020-L1CLG484I
6.3V
X5R
C74
47µF
GND
3.3V
VBATT
GND
3.3V
TMS
TDI
TDO
TCK
PROG_B
INIT
DONE
3.3V
1%
R72
4K99
3.3V
AVREF
AVCC
G
N
D
A
1
VOUT
B1
VIN
B2
EN
A2
U11
TLV70518YFPT
IN
1
OUT
2
G
N
D
3
U16
REF3312AIDCKT
3.3V
AGND
AVREF AVCC
AGND GND
3.3V
L7
BKP0603HS121-T
GND AGND
AGND
AGND
AGND
AGND
AGND
AVREF
AVCC
6.3V
X5R
C69
470nF
6.3V
X5R
C71
470nF
6.3V
X5R
C70
470nF
GND
GND
TMS
TDI
TDO
TCK
i FPGA_JTAG
VTTREF
TP22
Testpoint 0.8mm