User's Manual l MBa7x UM 0101 l © 2020, TQ-Systems GmbH
Page 9
Pinout TQMa7S (continued)
Table 5:
Pinout connector X2, TQMa7S
Ball
Dir.
Level
Group
Signal
Pin
Signal
Group
Level
Dir.
Ball
–
P
0 V
Power
DGND
1
2
DGND
Power
0 V
P
–
B4
O
1.8 / 3.3 V
USDHC
SD1_RESET#
3
4
PMIC_SD_VSEL
Config
3.3 V
O
R1
A5
I/O
1.8 / 3.3 V
USDHC
SD1_DATA0
5
6
SD1_CMD
USDHC
1.8 / 3.3 V
I/O
C5
A4
I/O
1.8 / 3.3 V
USDHC
SD1_DATA2
7
8
SD1_DATA1
USDHC
1.8 / 3.3 V
I/O
D6
B5
O
1.8 / 3.3 V
USDHC
SD1_CLK
9
10
SD1_DATA3
USDHC
1.8 / 3.3 V
I/O
D5
–
P
0 V
Power
DGND
11
12
SD1_WP
USDHC
1.8 / 3.3 V
I
C4
J5
O
3.3 V
SPI
ECSPI2_SCLK
13
14
SD1_CD#
USDHC
1.8 / 3.3 V
I
C6
H6
I
3.3 V
SPI
ECSPI2_MISO
15
16
DGND
Power
0 V
P
–
N6
I
3.3 V
USB_OTG
USB_OTG1_OC
17
18
ECSPI2_MOSI
SPI
3.3 V
O
G6
P1
I
3.3 V
USB_OTG
USB_OTG1_PWR
19
20
ECSPI2_SS0#
SPI
3.3 V
O
J6
C8
P
5 V
Power
USB_OTG1_VBUS
21
22
DGND
Power
0 V
P
–
–
P
0 V
Power
DGND
23
24
USB_OTG1_CHD#
USB_OTG
3.3 V
O
C7
A8
I/O
3.3 V
USB_OTG
USB_OTG1_DN
25
26
USB_OTG1_ID
USB_OTG
3.3 V
I
B7
B8
I/O
3.3 V
USB_OTG
USB_OTG1_DP
27
28
DGND
Power
0 V
P
–
–
P
0 V
Power
DGND
29
30
SAI1_TX_DATA
SAI
3.3 V
O
E11
B12
I/O
3.3 V
HSIC
USB_HOST_STROBE
31
32
SAI1_TX_BCLK
SAI
3.3 V
O
C11
–
P
0 V
Power
DGND
33
34
SAI1_TX_SYNC
SAI
3.3 V
O
D11
A12
I/O
3.3 V
HSIC
USB_HOST_DATA
35
36
DGND
Power
0 V
P
–
–
P
0 V
Power
DGND
37
38
SAI1_RX_DATA
SAI
3.3 V
I
E12
E10
O
3.3 V
SAI
SAI1_MCLK
39
40
SAI1_RX_BCLK
SAI
3.3 V
I
D12
–
P
0 V
Power
DGND
41
42
SAI1_RX_SYNC
SAI
3.3 V
I
C12
D15
O
3.3 V
WDOG
WDOG2#
43
44
DGND
Power
0 V
P
–
E19
I
3.3 V
WDOG
WDOG2_RESET#
45
46
ENET1_MDC
ENET
3.3 V
O
T1
–
P
0 V
Power
DGND
47
48
ENET1_MDIO
ENET
3.3 V
I/O
R5
F16
O
3.3 V
RGMII
RGMII1_TXC
49
50
DGND
Power
0 V
P
–
–
P
0 V
Power
DGND
51
52
RGMII1_RXC
RGMII
3.3 V
I
F15
F17
O
3.3 V
RGMII
RGMII1_TD0
53
54
DGND
Power
0 V
P
–
E17
O
3.3 V
RGMII
RGMII1_TD1
55
56
RGMII1_RD0
RGMII
3.3 V
I
E14
E18
O
3.3 V
RGMII
RGMII1_TD2
57
58
RGMII1_RD1
RGMII
3.3 V
I
F14
D18
O
3.3 V
RGMII
RGMII1_TD3
59
60
RGMII1_RD2
RGMII
3.3 V
I
D13
E16
O
3.3 V
RGMII
RGMII1_TX_CTL
61
62
RGMII1_RD3
RGMII
3.3 V
I
E13
–
P
0 V
Power
DGND
63
64
RGMII1_RX_CTL
RGMII
3.3 V
I
E15
F6
I/O
3.3 V
SIM
SIM_TRXD
65
66
DGND
Power
0 V
P
–
E5
O
3.3 V
SIM
SIM_RST#
67
68
LCD_ENABLE
LCD
3.3 V
O
F25
F5
O
3.3 V
SIM
SIM_SVEN
69
70
DGND
Power
0 V
P
–
E6
O
3.3 V
SIM
SIM_PD
71
72
LCD_CLK
LCD
3.3 V
O
E20
E4
O
3.3 V
SIM
SIM_CLK
73
74
DGND
Power
0 V
P
–
C21
O
3.3 V
LCD
LCD_RESET#
75
76
LCD_HSYNC
LCD
3.3 V
O
E25
–
P
0 V
Power
DGND
77
78
LCD_VSYNC
LCD
3.3 V
O
F24
D21
O
3.3 V
LCD
LCD_DATA00
79
80
DGND
Power
0 V
P
–
B22
O
3.3 V
LCD
LCD_DATA02
81
82
LCD_DATA01
LCD
3.3 V
O
A22
C22
O
3.3 V
LCD
LCD_DATA04
83
84
LCD_DATA03
LCD
3.3 V
O
A23
A24
O
3.3 V
LCD
LCD_DATA06
85
86
LCD_DATA05
LCD
3.3 V
O
B23
–
P
0 V
Power
DGND
87
88
LCD_DATA07
LCD
3.3 V
O
F20
E21
O
3.3 V
LCD
LCD_DATA08
89
90
DGND
Power
0 V
P
–
B24
O
3.3 V
LCD
LCD_DATA10
91
92
LCD_DATA09
LCD
3.3 V
O
C23
F21
O
3.3 V
LCD
LCD_DATA12
93
94
LCD_DATA11
LCD
3.3 V
O
G20
D23
O
3.3 V
LCD
LCD_DATA14
95
96
LCD_DATA13
LCD
3.3 V
O
E22
–
P
0 V
Power
DGND
97
98
LCD_DATA15
LCD
3.3 V
O
C24
B25
O
3.3 V
LCD
LCD_DATA16
99 100
DGND
Power
0 V
P
–
E23
O
3.3 V
LCD
LCD_DATA18
101 102
LCD_DATA17
LCD
3.3 V
O
G21
C25
O
3.3 V
LCD
LCD_DATA20
103 104
LCD_DATA19
LCD
3.3 V
O
D24
D25
O
3.3 V
LCD
LCD_DATA22
105 106
LCD_DATA21
LCD
3.3 V
O
E24
–
P
0 V
Power
DGND
107 108
LCD_DATA23
LCD
3.3 V
O
G23
M20
O
3.3 V
QSPI
QSPI_SCLK
109 110
DGND
Power
0 V
P
–
–
P
0 V
Power
DGND
111 112
QSPI_DATA0
QSPI
3.3 V
I/O
P20
M21
O
3.3 V
QSPI
QSPI_SS0#
113 114
QSPI_DATA1
QSPI
3.3 V
I/O
P21
M22
O
3.3 V
QSPI
QSPI_SS1#
115 116
QSPI_DATA2
QSPI
3.3 V
I/O
N20
N22
O
3.3 V
QSPI
QSPI_RESET#
117 118
QSPI_DATA3
QSPI
3.3 V
I/O
N21
–
P
0 V
Power
DGND
119 120
DGND
Power
0 V
P
–
