Toshiba TDP-D1, Руководство по обслуживанию

Страница: 82 / 111

81
This section provides design guidelines for the RGB Analog interface, and describes:
 Input Signals

 Sync on Green (SOG)

 Power

 Clocks and Phase Lock Loop (PLL)

 Layout

Input Signals
Care must be taken to minimize input capacitance while reducing sensitivity to noise on the
input. These are opposing themes when attempting to customize the input for specific performance.
To attempt to satisfy these goals, consider the following guidelines:
 Keep the input termination impedance 75  at frequencies up to twice the display design goal. To
 
do so, use an inductance to balance the board stray capacitance. This reduces unwanted termination
reflections at the frequencies of interest.
 The actual termination resistor needs to have its ground return point as close to the 15

-pin
connector as possible.
 After this initial termination, th

e circuit board appears as a high-impedance subsystem with a large
amount of stray capacitance. This stray capacitance comes primarily from the ESD protection
devices and the input circuit to the display processor. This capacitance can again be balanced out
with the proper amount of series inductance prior to the ESD protection device.
 Keep signal trace width as narrow as possible for these analog signals; the reason for this is that

the wider the trace, the higher the stay capacitance. Also, after the initial 75  termination, the

subsystem needs to be considered high impedance.