360014937
Copyright © 2000 Toshiba corporation. All rights reserved.
-
561 -
10.8.4 Read Sector (20h/21h)
COMMAND CODE
0 0 1 0 0 0 L X
REGISTER
REGISTER SETTING
NORMAL COMPLETION
DR
drive no.
no change
CY
starting cylinder
last possible
HD
starting head
last possible
SN
starting sector
last possible
SC
no. of sector to read
00H
FT
no
change
LBA
staring address
last address
Setting BSY bit, the drive will seek to the target cylinder if the head is not on target track ( implied seek ), select
the head and begin to read the number of sector defined in SC register ( 1-256 ) starting from the target sector.
After finding ID of target sector and having 1 sector of data read into the buffer RAM, the drive sets DRQ in status
register and generates interrupt to report to the host that the drive is ready to transfer the next data.
In case of multi-sector transfer, DRQ bit is reset and BSY is set after 1 sector transfer to prepare for the next
sector transfer.
An uncorrectable data can also be transferred but the subsequent operation will terminate at the cylinder, head,
and sector (or LBA) position in the TASK FILE register. When a sector is ready to be read by the host, an
interrupt is issued. After the last sector is read by the host, no interrupt is issued at the end of a command.
10.8.5 Read Long
6
(22h/23h)
If L bit =1, this command returns the requested data and associated ECC information . The data field
transfer is 16 bits wide, but the ECC information is accepted in only one byte (8 bits) at a time. Long
command is valid only for single sector transfer (SC=01).
10.8.6 Write Sector (30h/31h)
COMMAND CODE
0 0 1 1 0 0 L X
REGISTER
REGISTER SETTING
NORMAL COMPLETION
DR
drive no.
no change
CY
starting cylinder
last possible
HD
starting head
last possible
SN
starting sector
start sector
SC
no. of sector to write
00H
FT
no
change
LBA
starting address
last possible
The drive seeks to the target cylinder and selects the head and begins to write to the number of sectors
defined in SC register (1-256) starting from the target sector. DRQ in status register is set as soon as the
command register is written and the buffer RAM receives the data transferred from the host . After 1 sector
is transferred to the buffer RAM, the drive resets DRQ, sets BSY and begins write operation. In case of
multi-sector transfer, it sets DRQ bit, resets BSY and generates Interrupt to inform host that it is ready to
transfer the next 1 sector of data. The drive will seek to the target cylinder if the head is not on the target
track (implied seek). After transferring the last data in the buffer, it resets BSY and issues an interrupt.
6
ATA/ATAPI-4 defines this command as Vendor specific. The drive supports this command to maintain ATA-3, and the previous
models compatibility. User is recommended not to use this command.
