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D4223121B
Copyright © 2013 TOSHIBA TELI CORPORATION, All rights reserved.
www.toshiba-teli.co.jp
I/O Specification
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Signal Specification
- Trigger Input
Input Circuit : LVTTL
Level
: Low 0 ~ 0.5V, High 2.0 ~ 24.0V
Polarity
: High active / Low active (initial factory setting: Low active)
Pulse Width : Minimum 50
µ
s
- GPIO Output
Output Circuit
: 5V CMOS
Polarity
: High active / Low active (initial factory setting: Low active)
Signal Source
: TIMER0 ACTIVE
USER OUTPUT
EXPOSURE ACTIVE
FRAME ACTIVE
FRAME TRANSFER
FRAME TRIGGER WAIT
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Circuit diagram
- Trigger Input
Notes of external trigger signal:
Depending on cable length, cable kinds and input current of trigger input line, Random Trigger Shutter operation may not
satisfy timing specification or camera