A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
2
1
3
4
5
6
7
8
2
1
3
4
5
6
7
8
W816
V4
K4
J4
IC2401 X242
ATSC/CLEAR CABLE ASIC IC
D4
D8
D9
E4
D19
D5
AC15
AC13
AC16
AC12
AC8
AC7
P4
AC14
D13
D7
D23
F4
G4
H4
L4
M4
AC4
N4
D18
D17
D6
AC5
AC6
AC11
AC17
AC18
E23
AC10
AC9
N23
P23
AA23
P9
IC2401
X242
ATSC/CLEAR CABLE ASIC IC
D11
D12
P10
D14
P11
D15
P12
D16
P13
P14
J10
P15
J11
P16
J12
P17
J13
P18
J14
R9
J15
R10
J16
R11
J17
R12
R13
K9
R14
K10
R15
K11
R16
K12
R17
K13
R18
K14
T9
K15
T10
K16
T11
K17
T12
K18
T13
L9
T14
L10
T15
L11
T16
L12
T17
L13
T18
L14
U9
L15
U10
L16
U11
L17
U12
L18
U13
M9
U14
M10
U15
M11
U16
M12
U17
M13
U18
M14
M15
V10
M16
V11
M17
V12
M18
V13
V14
N9
V15
N10
V16
N11
V17
N12
N13
N14
N15
N16
N17
N18
AE26
AF25
AE24
AD24
AE25
AF24
AF23
AD4
AD5
AE5
IC2401
X242
ATSC/CLEAR CABLE ASIC IC
A19
B19
C19
A18
B18
C18
A17
B17
C17
B20
C20
A20
T4
U4
R4
M2
P1
P2
P3
R1
R2
R3
T1
T2
T3
U1
U2
J2
J3
H1
N1
M3
J1
K3
K2
K1
L3
L2
L1
M1
N3
IC2401
X242
ATSC/CLEAR CABLE ASIC
U3
V3
N2
AF14
AF13
AE13
AD14
AE14
AF15
AD13
AF12
AE12
AD12
AE11
AD11
AE9
AD9
AF8
AE8
AD8
AF7
AE7
AD7
AF6
AE6
AD6
AF5
AF11
AF10
AE10
AF9
AD10
C2441
0.1 B
C2440
1 B
C2442
0.1 B
C2444
1 B
C2446
1 B
C2448
1 B
C2450
1 B
C2452
1 B
C2443
0.1 B
C2445
0.1 B
C2447
0.1 B
C2449
0.1 B
C2451
0.1 B
C2455
0.1 B
C2454
0.1 B
C2453
0.1 B
C2416
1 B
C2418
1 B
C2420
1 B
C2422
1 B
C2424
1 B
C2426
1 B
C2432
1 B
C2437
0.1 B
C2435
0.1 B
C2433
0.1 B
C2431
0.1 B
C2429
0.1 B
C2427
0.1 B
C2425
0.1 B
C2421
0.1 B
C2419
0.1 B
C2417
0.1 B
C2415
0.1 B
C2428
1 B
C2434
1 B
C2423
10 C
C2430
10 C
C2436
10 C
C2414
0.001 B
C2408
0.1
B
C2409
0.1
B
C2410
0.1
B
C2411
0.1
B
C2403
10 C
C2404
1 B
C2401
10 C
C2402
10 C
C2439
10 C
C2405
20P CH
C2407
0.1
B
C2406
22P CH
C2548
15P
CH
R2403
4.7K
R2402
1M
R2445
22
R2451
10K
R2452
10
B2403
FCM1608KF-151T06
B2404
FCM1608KF-151T06
B2401
FCM1608KF-151T06
B2402
FCM1608KF-151T06
X2401
25.140MHz
100DT02503
+-15ppm
JG2406
JG2407
JG2408
JG2404
JG2405
JG2403
JG2410
XRESET_OUT#
JG2409
XRESET_IN#
JG2402
JG2438
DVOCLK1
JG2476
DVI_CEC
WAS RECEIVED IN GOOD CONDITION AND PICTURE IS NORMAL.
WITH THE DIGITAL TESTER WHEN THE COLOR BROADCAST
NOTE:THE DC VOLTAGE AT EACH PART WAS MEASURED
OF PRINTING AND SUBJECT TO CHANGE WITHOUT NOTICE
NOTE: THIS SCHEMATIC DIAGRAM IS THE LATEST AT THE TIME
HS2401
763WAA0359
NR2401
4D02WGJ0220TCE
NR2402
4D02WGJ0220TCE
NR2403
4D02WGJ0220TCE
NR2404
4D02WGJ0220TCE
NR2405
4D02WGJ0220TCE
NR2406
4D02WGJ0220TCE
NR2407
4D02WGJ0220TCE
R7
R6
R5
R4
R3
R2
R1
DVIDATA0
B0
R0
G7
DVIDATA1
B1
G6
G5
DVIDATA2
B2
G4
G3
DVIDATA3
B3
G2
G1
DVIDATA4
B4
G0
DVIDATA5
B5
B7
B6
DVIDATA6
B6
B5
B4
DVIDATA7
B7
B3
B2
DVIDATA8
G0
B1
B0
DVIDATA9
G1
DCLK1
DVIDATA10
G2
DHS
DVS
DVIDATA11
G3
DEN
DVIDATA12
G4
DVIDATA13
G5
DVIDATA14
G6
DVIDATA15
G7
R0
R1
R2
R3
R4
R5
R6
DVIDATA0
DVIDATA1
R7
DVIDATA2
DVIDATA3
DVIDATA4
DVIDATA5
DVICLK
DVIDATA6
DVIDATA7
DVIDE
DVIDATA8
DVIDATA9
DCLK1
DVIHSYNC
DVIDATA10
DEN
DVIDATA11
DHS
X_RESET_OUT#
X_RESET_IN#
DVIVSYNC
DVIDATA12
DVS
DVIDATA13
DVIDATA14
DVIDATA15
DVICLK
DVIHSYNC
DVIVSYNC
DVIDE
X_RESET_OUT#
DTV_RESET
DTV_RESET
VDDC_1.0V
+2.5V_IO
+3.3V
GND
H-2
H-1
2.5
2.5
2.5
0
0
0
0
0
0
0
0
0
1.0
1.0
3.3
3.3
3.3
NC
NC
NC
(DIGITAL PCB)
ASIC SCHEMATIC DIAGRAM
NC
FROM/TO VIDEO AD
NC
NC
NC
NC
NC
NC
NC
NC
(1/14 VDD)
3.4
3.4
3.4
3.4
3.4
3.4
3.4
3.4
3.4
3.4
3.4
3.4
3.4
3.4
3.4
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDR3_1
VDDR3_2
VDDR3_3
VDDR3_4
VDDR3_5
VDDR3_6
VDDR3_7
VDDR3_8
VDDR3_9
VDDR3_10
VDDR3_11
VDDR3_12
VDDR3_13
VDDR3_14
VDDR3_15
VDDC25_TOP
VDDC25_BOTTOM
VDDC25_LEFT
0
0
(2/14 VSS)
VSS_1
VSS_56
0
0
VSS_2
VSS_57
0
0
VSS_3
VSS_58
0
0
VSS_4
VSS_59
0
0
VSS_5
VSS_60
0
VSS_61
0
0
VSS_7
VSS_62
0
0
VSS_8
VSS_63
0
0
VSS_9
VSS_64
0
0
VSS_10
VSS_65
0
0
VSS_11
VSS_66
0
VSS_12
VSS_67
0
VSS_13
VSS_68
0
0
0
0
VSS_14
VSS_69
0
VSS_70
0
0
VSS_16
VSS_71
0
0
VSS_17
VSS_72
0
0
VSS_18
VSS_73
0
0
VSS_19
VSS_74
0
0
VSS_20
VSS_75
0
0
VSS_21
VSS_76
0
0
VSS_22
VSS_77
0
0
VSS_23
VSS_78
0
0
VSS_24
VSS_79
0
0
VSS_25
VSS_80
0
0
VSS_26
VSS_81
0
0
VSS_27
VSS_82
0
0
VSS_28
VSS_83
0
0
VSS_29
VSS_84
0
0
VSS_30
VSS_85
0
0
VSS_31
VSS_86
0
0
VSS_32
VSS_87
0
0
VSS_33
VSS_88
0
0
VSS_34
VSS_89
0
0
VSS_35
VSS_90
0
0
VSS_36
VSS_91
0
0
VSS_37
VSS_92
0
0
VSS_38
VSS_93
0
0
VSS_39
VSS_94
0
0
VSS_40
VSS_95
0
VSS_41
0
0
VSS_42
VSS_97
0
0
VSS_43
VSS_98
0
0
VSS_44
VSS_99
0
VSS_45
0
VSS_100
0
0
VSS_46
VSS_101
0
0
VSS_47
VSS_102
0
0
VSS_48
VSS_103
0
0
VSS_49
VSS_104
VSS_50
0
0
VSS_51
0
VSS_52
0
VSS_53
0
VSS_54
0
VSS_55
TAPSEL
TRST#
TDI
TDO
TMS
TCK
DINT
TESTEN
3.3
3.3
RESET_IN#
RESET_OUT#
NC_0
NC_1
NC_2
FE_XTALIN
FE_XTALOUT
FE_OSC_CLK
FE_OSC_AVDD
FE_OSC_AVSS
FE_OSC_GUARD
FPVDD
FPVSS
FPVDD1.0
DPVDD
DPVSS
DPVDD1.0
(4/14 OSC)
DVICLK
DVIDATA(0)
DVIDATA(1)
DVIDATA(2)
DVIDATA(3)
DVIDATA(4)
DVIDATA(5)
DVIDATA(6)
DVIDATA(7)
DVIDATA(8)
DVIDATA(9)
DVIDATA(10)
DVIDATA(11)
DVIDATA(12)
DVIDATA(13)
DVIDATA(14)
DVIDATA(15)
DVIDATA(16)
DVIDATA(17)
DVIDATA(18)
DVIDATA(21)
DVIDATA(20)
DVIDATA(19)
DVIDATA(22)
DVIDATA(23)
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.4
3.4
3.4
3.4
3.4
3.3
3.4
3.4
3.3
3.3
3.3
3.3
3.3
IRBIDB
DVIVSYNC
DVIHSYNC
DVIDE
DVOCLK1
DVOCLK0
DVODE
DVOHSYNC
DVOVSYNC
DVODATA(0)
DVODATA(1)
DVODATA(2)
DVODATA(3)
DVODATA(4)
DVODATA(5)
DVODATA(6)
DVODATA(7)
DVODATA(8)
DVODATA(9)
DVODATA(10)
DVODATA(11)
DVODATA(12)
DVODATA(13)
DVODATA(14)
DVODATA(15)
DVODATA(16)
DVODATA(17)
DVODATA(18)
DVODATA(19)
DVODATA(20)
DVODATA(21)
DVODATA(22)
DVODATA(23)
(10/14 DVI/DVO)
FROM/TO LVDS
FROM/TO FLASH
FROM/TO MICON
FROM/TO POWER1
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.4
3.4
3.4
3.4
3.4
2.6
2.6
2.6
2.6
0
2.6
0
2.6
0
23
22
PCBDH0
CEF251