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Schematic page 4.
5.3.3. System
Clock
Schematic page 3
VCXO1 generates the system clock.
The ‘SCLK’ signal is 27.000MHz clock signal .
If the color of the picture disappear , the ‘SCLK’ signal may be different from 27.000MHz or the VCXO1
have bad quality. In this case, replace VCXO1 with new one.
- Check point 1 -
Check the input and output of ‘F1’. All of them should have 27Mhz clock signal.
If F1.3 have not 27Mhz clock signal, it may the problem of VCXO1.
- Check point 2 -
If the video output of receiver has not color, It may the problem of VCXO1.
5.3.4. RS232 Data Port (Program download port) and Program download
Connect a PC with a download cable (Female-Female Cross cable). If it fails program download and
Содержание TF4000FI
Страница 1: ...TF4000Fi Service Manual 15 March 2004 Topfield Co Ltd...
Страница 19: ...0 12 2 3 2 2 2 4 5 6 7...
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Страница 43: ...TSOP48 SB1 Vishay Telefunken Rev 6 29 Mar 01 www vishay com Document Number 82108 6 7 Dimensions in mm 16777...
Страница 46: ...19 7 Schematic Diagrams 7 1 Schematic diagram of Front Board see next page...
Страница 48: ...20 7 2 Schematic diagram of Main Board see next page...
Страница 61: ...21 7 3 Schematic diagram of SMPS power supply see next page...
Страница 62: ......