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Layout Guidelines, EVM Schematic, and Assembly Drawings
7
Layout Guidelines, EVM Schematic, and Assembly Drawings
7.1
Layout Guidelines
Thermal pad
The thermal pad provides a thermal and mechanical interface between the device and the printed circuit
board (PCB). While device power dissipation is not of primary concern, a more robust thermal interface
can help the internal temperature sensor provide a better representation of PCB temperature. Connect the
exposed thermal pad of the PCB to the device VSS pins and provide at least a 4 × 4 pattern of PCB vias
to connect the thermal pad and VSS pins to the circuit ground on other PCB layers.
Supply voltage decoupling
Provide power supply pin bypass to the device as follows:
•
0.1µF, X7R ceramic in parallel with 0.01µF, X7R ceramic at pin 47 (BPCAP)
•
0.1µF, X7R ceramic in parallel with 4.7µF, X5R ceramic at pin 44 (V33D)
•
0.1µF, X7R ceramic at pin 7 (V33DIO)
•
0.1µF, X7R ceramic in parallel with 4.7µF, X5R ceramic at pin 46 (V33A)
Digital output signals
Depending on use and application of the various GPIO signals used as digital outputs, some impedance
control may be desired to quiet fast signal edges. For example, when using the FPWM pins for fan control
or voltage margining the pin will be configured as a digital clock signal. Route these signals away from
sensitive analog signals. It is also good design practice to provide a series impedance of 20–33
Ω
at the
signal source to slow fast digital edges.
PMBus clock and data
Route PMBUS_CLK and PMBUS_DATA in a careful fashion away from sensitive analog signals. Provide
a series impedance of 20–33
Ω
at the signal source.
7.2
EVM Schematic
The searchable PDF of the schematic is appended to this User's Guide.
7.3
Assembly Drawings
The assembly drawings are appended to this User's Guide. The topside and bottomside component
layouts are searchable.
37
SLVU347 – December 2009
Evaluation Module for UCD90120 and UCD90124
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