Texas Instruments UCC5390SCD, Руководство пользователя

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Test Summary
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10 SLLU282A – December 2017 – Revised February 2018
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UCC5390SCD With Isolated Bias Supply
5.3.9 Initial Oscilloscope Settings
Table 5 lists the initial oscilloscope settings. Because various bandwidth probes are used, it is
recommended to de-skew all channels to minimize delay differences.
Table 5. Initial Oscilloscope Settings
Output Bandwidth Probe Coupling Vertical Scale Horizontal
Scale
Measured
Waveforms
Channel 1 ≥ 50 MHz TCP202 DC 2 A/div 2 µs/div Inductor current
Channel 2 ≥ 200 MHz THDP020 DC 10 V/div 2 µs/div Vgs, upper FET
Channel 3
≥
200 MHz THDP020 DC 200 V/div 2 µs/div Vds, lower FET
Channel 4 ≥ 500 MHz P6139A DC 10 V/div 2 µs/div Vgs, lower FET
5.3.10 Bench Setup
This EVM is designed to ensure easy and close connection to the power stage FET or IGBT in the TO-
220 or TO-247 package.
Figure 4 shows an example of how the drive board can be attached and soldered
directly to the power FET terminals.
Figure 4. Soldering UCC5390SCDEVM-010 Board for System Level Evaluation