Digital PFC Description
12.3.6
UCD3138 Resource Allocation for PFC Control
Table 5. J3 and J4 Pin Assignment
UCD3138 CONTROL
HEADER PIN NUMBER
DESCRIPTION
CARD PIN NAME
J3-1
DPWM_0A
RC filter for debug monitoring
J3-2
DPWM_0B
Not used
J3-3
DPWM_1A
Not used(available as an option for PFC PWM1)
J3-4
DPWM_1B
PFC PWM1
J3-5
DPWM_2A
Not used(available as an option for PFC PWM2)
J3-6
DPWM_2B
PFC PWM2
J3-7
DPWM_3A
PFC ZVS control
J3-8
DPWM_3B
AC drop indicator signal
J3-9
DGND
Digital ground GND1
J3-10
DGND
Digital ground GND1
J3-11
FAULT-0
Inrush relay control
J3-12
Not used
Not used
J3-13
FAULT-1
LED 1
J3-14
Not used
Not used
J3-15
SYNC
Sync input signal for PFC stage
J3-16
Not used
Not used
J3-17
FAULT-2
Not used
J3-18
Not used
Not used
J3-19
Not used
Not used
J3-20
Not used
Not used
J3-21
Not used
Not used
J3-22
FAULT-3
Not used
J3-23
SCI_TX1
SCI_TX1
J3-24
SCI_RX1
SCI_RX1
J3-25
PWM0
LED 2
J3-26
PWM1
LED 3
J3-27
Not used
Not used
J3-28
Not used
Not used
J3-29
TCAP
Not used
J3-30
Not used
Not used
J3-31
SCI TX0
SCI TX0
J3-32
SCI TX0
SCI RX0
J3-33
INT-EXT
Not used
J3-34
EXT-TRIG
Not used
J3-35
DGND
Not used
J3-36
RESET*
Not used
J3-37
DGND
Digital ground GND1
J3-38
DGND
Digital ground GND1
J3-39
+12V_EXT
Ex12V DC supply
J3-40
3.3VD
Not used
J4-01
AGND
Analog ground GND2
J4-02
Not used
Not used
J4-03
AGND
Analog ground GND2
J4-04
AD_00
PMBus address
J4-05
AGND
Analog ground GND2
35
SLUU885B – March 2012 – Revised July 2012
Digitally Controlled Single-Phase PFC Pre-Regulator
Copyright © 2012, Texas Instruments Incorporated