Texas Instruments UCC2 5 EVM-286 Series Скачать руководство пользователя страница 11

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8 Schematic

Figure 8-1

only shows the schematic diagram for UCC21520EVM. The schematic diagrams for the UCC20520EVM, UCC21521CEVM, and

UCC21530EVM are similar to

Figure 8-1

, with the exception that the device under test (U1) could be in one of the following driver ICs: UCC21520DW,

UCC20520DW, UCC21521CDW, or UCC21530DWK.

TP11

INA

GND

TP12

INB

GND

TP13

OUTA

TP14

VGSA

TP15

OUTB

TP16

VGSB

100

10.0k

R10

0.1uF

2200pF

TP3

INA

TP4

GND

TP5

INB

TP6

GND

TP7

EN/DIS

TP8

GND

TP9

TP10

GND

1µF

33pF

GND

TP1

VCCI

TP2

GND

VCCI

GND

VCCI

100K

10.0k

R16

10.0k

R17

3.90

R11

DNP

3.90

R14

DNP

R19

1000pF

C11

1000pF

C12

TP17

VDDA

TP18

OUTA

TP19

VSSA

TP20

VDDB

TP21

OUTB

TP22

VSSB

30V

DNP

30V

DNP

1µF

C13

10uF

VSSB

VDDA

VDDB

3.90

R15

DNP

VSSA

R18

INA

INB

INA

INB

OUTA

OUTB

OUTA_CAP

OUTB_CAP

EN/DIS

OUTA

OUTB

OUTB_CAP

OUTA_CAP

GND

VSSA

VSSB

600V

DNP

100nF

C10

100nF

C14

10.0

R12

10.0

R13

VCCI

VDDA

VDDB

DISABLE

INA

INB

OUTA

OUTB

GND

VSSA

VSSB

UCC21520DW

Figure 8-1. UCC21520EVM-286 Schematic

www.ti.com

Schematic

SLUUBG8C – NOVEMBER 2018 – REVISED OCTOBER 2021

Submit Document Feedback

Using the UCC21520EVM-286, UCC20520EVM-286, UCC21521CEVM-286, and UCC21530EVM-286

Содержание UCC2 5 EVM-286 Series

Страница 1: ...2 Equipment 5 5 3 Equipment Setup 5 6 Power Up and Power Down Procedure 8 6 1 Power Up 8 6 2 Power Down 8 7 Test Waveforms CL 0pF With Different DT Configurations 9 7 1 DT Connected to VCCI J DT Option B in Table 3 2 9 7 2 DT Pin Floating or Left Open J DT Option A in Table 3 2 9 7 3 DT Pin Connected to RDT J DT Option C in Table 3 2 10 8 Schematic 11 9 Layout Diagrams 12 10 List of Materials 13 1...

Страница 2: ...nables designers to build smaller more robust designs for enterprise telecom automotive and industrial applications with a faster time to market 2 Description The UCC2x5xx evaluation board has three independent screw terminal blocks for VCCI VDDA and VDDB The 3 position headers with jumpers for all the key input signals such as PWM INPUTs INA INB or PWM dead time DT programming and enable disable ...

Страница 3: ...probing all the key pins of the UCC21520DW UCC20520DW UCC21521CDW UCC21530DWK and other wide body ISO driver family parts 3 1 I O Description Table 3 1 Jumpers Setting PINS DESCRIPTION J1 VCCI VCCI positive J1 INA INA PWM signal J1 GND VCCI ground J2 VCCI VCCI positive J2 INB INB signal J2 GND VCCI ground J3 VCCI VCCI positive J3 EN DIS Enable Disable signal J3 GND VCCI ground J4 VCCI VCCI positiv...

Страница 4: ...er on J3 EN DIS and J3 GND Option C Jumper on J3 EN DIS and J3 VCCI J DT Option A Jumper not installed interlock with 8 ns dead time Option B Option B Jumper on J4 DT and J4 VCCI allows driver output overlap or driver output follows PWM input for UCC21520EVM and UCC21521CEVM The dead time will be around 0 ns in this option for UCC20520EVM Option C Jumper on J4 DT and J4 R2 set the dead time by DT ...

Страница 5: ...5 2 Equipment 5 2 1 Power Supplies Three DC power supply with voltage current above 25 V 1 A for example Agilent E3634A 5 2 2 Function Generators One two channel function generator over 20 MHz for example Tektronics AFG3252 5 3 Equipment Setup 5 3 1 DC Power Supply Settings DC power supply 1 Voltage setting 5 V Current limit 0 05 A DC power supply 2 Voltage setting 12 V for UCC21520EVM and UCC2052...

Страница 6: ...nts need to be installed before test 1 Install shunt 1 for header J3 DIS on pin EN DIS GND for the UCC21520EVM shown in Figure 5 1 For the UCC20520EVM UCC21521CEVM and the UCC21530EVM refer to Table 3 1 The UCC20520EVM is set as disable high on the DIS pin while the UCC21521CEM and UCC21530EVM is set as enable high on the EN pin 2 Install shunt 2 on header J4 DT on pin VCCI DT as shown in Figure 5...

Страница 7: ...plied on GND TP2 Power supply 2 positive node connected to input of DMM 1 and DMM 1 output connected to VDDA TP17 negative node connected directly to VSSA TP19 Power supply 3 positive node connected to input of DMM 2 and DMM 2 output connected to VDDB TP20 negative node connected directly to VSSB TP22 Oscilloscope channel A probes TP14 smaller measurement loop is preferred Oscilloscope channel B p...

Страница 8: ...igure 6 1 b Scope frequency measurement is the same with function generator output c DMM 1 and 2 read measurement results should be around 10 mA 2 mA under no load conditions For more information about operating current refer to the UCC21520 data sheet Figure 6 1 Example Input and Output Waveforms Channels 3 and 4 are PWM Inputs Channels 1 and 2 are Outputs 6 2 Power Down 1 Disable function genera...

Страница 9: ...nels 1 and 2 are Driver Outputs 7 2 DT Pin Floating or Left Open J DT Option A in Table 3 2 The dead time DT between the outputs of the two channels is around 8 ns which is preset for interlock protections see Figure 7 2 Figure 7 2 Test Waveforms if DT is Left Open Channel 3 and 4 are PWM Inputs and Channel 1 and 2 are Driver Outputs www ti com Test Waveforms CL 0pF With Different DT Configuration...

Страница 10: ...ime is larger than 300 ns The major consideration is that the current through the RDT is used to set the dead time and this current decreases as RDT increases This bypass capacitor is not installed in the EVM but the user can easily install it on the bottom layer where the RDT is located Figure 7 3 Test Waveforms if DT Connected to RDT Channel 3 and 4 is PWM Inputs and Channel 1 and 2 is Driver Ou...

Страница 11: ...GND GND GND GND TP1 VCCI TP2 GND VCCI VCCI VCCI VCCI GND GND GND VCCI 100K R2 0 R9 10 0k R16 10 0k R17 3 90 R11 DNP 3 90 R14 DNP 0 R19 1000pF C11 1000pF C12 TP17 VDDA TP18 OUTA TP19 VSSA TP20 VDDB TP21 OUTB TP22 VSSB D3 30V DNP D2 30V DNP 1µF C13 10uF C9 VSSB VDDA VDDB 3 90 R15 DNP VSSA 0 R18 INA INB INA INB OUTA OUTB OUTA_CAP OUTB_CAP EN DIS DT OUTA OUTB OUTB_CAP OUTA_CAP GND VSSA VSSA VSSB VSSB ...

Страница 12: ...pt for the labels that designate the EVM part number with the device under test Figure 9 1 Top Overlay Figure 9 2 Top Layer Figure 9 3 Bottom Layer Figure 9 4 Bottom Overlay Layout Diagrams www ti com 12 Using the UCC21520EVM 286 UCC20520EVM 286 UCC21521CEVM 286 and UCC21530EVM 286 SLUUBG8C NOVEMBER 2018 REVISED OCTOBER 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated ...

Страница 13: ...17 TP18 TP19 TP20 TP21 TP22 Test Point Miniature SMT Std Std 0 D1 Diode Ultrafast 600 V 1 A SMA Not Populated Not Populated 0 D2 D3 Diode Schottky 30 V 1 A AEC Q101 MicroSMP Not Populated Not Populated 0 R11 R14 R15 RES 3 90 1 0 125 W 0805 Not Populated Not Populated 1 U1 UCC21520DW UCC20520DW UCC21521CDW and UCC21530DWK 4 A and 6 A 5 KVRMS Dual Isolated channel Universal Gate Driver DW0016A and D...

Страница 14: ...m Revision June 2016 to Revision A November 2016 Page Added device type to include the UCC20520EVM 286 and UCC21521CEVM 286 Evaluation Modules 1 www ti com 14 Using the UCC21520EVM 286 UCC20520EVM 286 UCC21521CEVM 286 and UCC21530EVM 286 SLUUBG8C NOVEMBER 2018 REVISED OCTOBER 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated ...

Страница 15: ...other than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control techniques are used to the extent TI deems necessary TI does not test all parameters of each EVM User s claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects...

Страница 16: ... These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instructions may cause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation...

Страница 17: ...y for convenience and should be verified by User 1 Use EVMs in a shielded room or any other test facility as defined in the notification 173 issued by Ministry of Internal Affairs and Communications on March 28 2006 based on Sub section 1 1 of Article 6 of the Ministry s Rule for Enforcement of Radio Law of Japan 2 Use EVMs only after User obtains the license of Test Radio Station as provided in R...

Страница 18: ... any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard User assumes all responsibility and liability for any improper or unsafe handling or use of the EVM by User or its employees affiliates contractors or designees 4 4 User assumes all...

Страница 19: ...OR DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthermore no return of EVM s will be accepted if the package has been opened and no return of the EVM s will be accepted if they are damaged or otherwise not in a resalable condition If User feels it has...

Страница 20: ...o change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of these resources is prohibited No license is granted to any other TI intellectual property right or to any third party intellectual property right TI disclaims responsibility for and you will fully indemn...

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