0
1
2
3
4
5
6
7
0
25
50
75
100
125
150
175
200
225
250
275
300
325
RF Input Voltage Level at RF_IN1 (mV )
PP
RSSI Levels and Oscillator Status Register V
alue (0x0F)
28
SLOS743L – AUGUST 2011 – REVISED MARCH 2017
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Detailed Description
Copyright © 2011–2017, Texas Instruments Incorporated
Figure 6-6. Digital External RSSI Value vs RF Input Level in V
PP
(mV)
The relation between the 3-bit code and the external RF field strength (A/m) sensed by the antenna must
be determined by calculation or by experiments for each antenna design. The antenna Q-factor and
connection to the RF input influence the result. Direct command 0x19 is used to trigger an external RSSI
measurement.
For clarity, to check the internal or external RSSI value independent of any other operation, the user must:
1. Set transmitter to desired state (on or off) using Bit 5 of Chip Status Control register (0x00) and enable
receiver using Bit 1.
2. Check internal or external RSSI using direct commands 0x18 or 0x19, respectively. This action places
the RSSI value in the RSSI register.
3. Delay at least 50 µs.
4. Read the RSSI register using direct command 0x0F; values range from 0x40 to 0x7F.
5. Repeat steps 1 to 4 as needed. The register is reset when it is read.
6.6
Oscillator Section
The 13.56-MHz or 27.12-MHz crystal (or oscillator) is controlled by the Chip Status Control register (0x00)
and the EN and EN2 terminals. The oscillator generates the RF frequency for the RF output stage as well
as the clock source for the digital section. The buffered clock signal is available at pin 27 (SYS_CLK) for
any other external circuits. B4 and B5 inside the Modulation and SYS_CLK register (0x09) can be used to
divide the external SYS_CLK signal at pin 27 by 1, 2, or 4.
Typical start-up time from complete power down is in the range of 3.5 ms.
During Power Down Mode 2 (EN = 0, EN2 = 1) the frequency of SYS_CLK is switched to 60 kHz (typical).
The crystal needs to be connected between pin 30 and pin 31. The external shunt capacitors values for C
1
and C
2
must be calculated based on the specified load capacitance of the crystal being used. The external
shunt capacitors are calculated as two identical capacitors in series plus the stray capacitance of the
TRF7970A and parasitic PCB capacitance in parallel to the crystal.
The parasitic capacitance (C
S
, stray and parasitic PCB capacitance) can be estimated at 4 to 5 pF
(typical).
As an example, using a crystal with a required load capacitance (C
L
) of 18 pF, the calculation is shown in
.
