Texas Instruments TPSM8286 AA0 Series, Руководство пользователя, Страница: 1 / 15

User’s Guide
TPSM8286xAA0xEVM Evaluation Module
ABSTRACT
The TPSM8286xAA0xEVM facilitates the evaluation of the TPSM82864AA0SRDJR and TPSM82866AA0SRDJR
4-A and 6-A pin-to-pin compatible step-down power modules with DCS-Control in a 3.5-mm × 4-mm x 1.4-mm
overmolded QFN package and the TPSM82864AA0HRDMR and TPSM82866AA0HRDMR 4-A and 6-A pin-to-
pin compatible step-down power modules with DCS-Control in a 3.5-mm × 4-mm x 1.8-mm overmolded QFN
package. The EVMs provide a 1.2-V output voltage with 1% accuracy for input voltages from 2.4 V to 5.5 V. The
TPSM82864A and TPSM82866A are high-efficiency and small solutions for the following:
• Point-of-load (POL) power in applications such as the core supply for FPGAs, CPUs, and ASICs
• Optical modules
• Medical imaging
• Industrial transport
• Solid state drives (SSDs)
• Other space-limited applications
Table of Contents
1 Introduction ............................................................................................................................................................................. 2
1.1 Performance Specification................................................................................................................................................. 2
1.2 Modifications...................................................................................................................................................................... 2
2 Setup ........................................................................................................................................................................................ 4
2.1 Setup.................................................................................................................................................................................. 4
2.2 Input, Output Connector and Jumper Descriptions............................................................................................................ 4
3 Safety Instructions .................................................................................................................................................................. 4
4 Test Results ............................................................................................................................................................................. 5
5 Board Layout ........................................................................................................................................................................... 7
6 Schematic and Bill of Materials ............................................................................................................................................. 7
6.1 Schematic.......................................................................................................................................................................... 8
6.2 Bill of Materials................................................................................................................................................................... 9
7 Revision History ...................................................................................................................................................................... 9
List of Figures
Figure 1-1. Loop Response Measurement Modification.............................................................................................................. 3
Figure 4-1. Thermal Performance (TPSM82866AA0SEVM, V
IN
= 5 V, V
OUT
= 1.2 V, I
OUT
= 6 A)............................................... 5
Figure 4-2. Thermal Performance (TPSM82866AA0HEVM, V
IN
= 5 V, V
OUT
= 1.2 V, I
OUT
= 6 A).............................................. 5
Figure 4-3. Loop Response Measurement (V
IN
= 5 V, V
OUT
= 1.2 V, I
OUT
= 6 A)........................................................................ 6
Figure 5-1. Top Assembly............................................................................................................................................................ 7
Figure 5-2. Top Layer................................................................................................................................................................... 7
Figure 5-3. Internal Layer 1......................................................................................................................................................... 7
Figure 5-4. Internal Layer 2......................................................................................................................................................... 7
Figure 5-5. Bottom Layer............................................................................................................................................................. 7
Figure 5-6. Bottom Layer (Mirrored)............................................................................................................................................ 7
Figure 6-1. TPSM8286xAA0xEVM Schematic............................................................................................................................ 8
List of Tables
Table 1-1. Performance Specification Summary.......................................................................................................................... 2
Table 6-1. TPSM8286xAA0xEVM Bill of Materials...................................................................................................................... 9
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SLVUCB0A – SEPTEMBER 2021 – REVISED NOVEMBER 2022
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