Texas Instruments TPS7A78EVM-011, Руководство пользователя

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Time (ms)
Volta
ge
(V)
Volta
ge
(V)
0 1 2 3 4 5 6 7 8 9 10
0 0
1 8
2 16
3 24
4 32
5 40
6 48
V
LDO_OUT
V
PF
V
AC_P
Time (sec)
DC
Volta
ge
(V)
AC
V
ol
tag
e
(V
)
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
-1 -400
0 0
1 400
2 800
3 1200
4 1600
5 2000
V
LDO_IN
V
LDO_OUT
V
AC
V
PG
Time (sec)
DC
Volta
ge
(V)
AC
V
ol
tag
e
(V
)
0 0.1 0.2 0.3 0.4 0.5
-1 -400
0 0
1 400
2 800
3 1200
4 1600
5 2000
V
LDO_IN
V
LDO_OUT
V
AC
V
PG
Time (sec)
DC
Volta
ge
(V)
AC
V
ol
tag
e
(V
)
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
-1 -200
0 0
1 200
2 400
3 600
4 800
5 1000
V
LDO_IN
V
LDO_OUT
V
AC
V
PG
Time (sec)
DC
Volta
ge
(V)
AC
V
ol
tag
e
(V
)
0 0.1 0.2 0.3 0.4 0.5
-1 -200
0 0
1 200
2 400
3 600
4 800
5 1000
V
LDO_IN
V
LDO_OUT
V
AC
V
PG
EVM Setup
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8 SBVU048 – March 2019
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TPS7A78EVM-011 Evaluation module
5.3.1 Startup
Figure 2 to Figure 5 show various start-up plots for the TPS7A78EVM-011.
Figure 2. Startup: 120-V
AC
Half-Bridge (HB) and 27-mA
Load Current
Figure 3. Startup: 120-V
AC
Full-Bridge (FB) and 55-mA
Load Current
Figure 4. Startup: 230-V
AC
Half-Bridge (HB) and 27-mA
Load Current
Figure 5. Startup: 230-V
AC
Full-Bridge (FB) and 55-mA
Load Current
In Figure 6 , the power-fail detect (PFD) trace and resistor divider was placed close to the AC_P pin and as
a result the power-fail (PF) signal glitches whenever there is a shunt event; see the TPS7A78 Feature
Description section for details on the device active bridge control. Figure 6 shows the PF signal glitch.
Figure 6. PF Signal Glitch