Texas Instruments TPS65910A Series Скачать руководство пользователя страница 8

Страница: 8 / 13

Connection Diagram and TPS65910Ax EEPROM Definition

www.ti.com

Table 2

lists the EEPROM definition of the TPS65910Ax and

Figure 3

shows the corresponding power-up

sequence.

Table 2. EEPROM Configuration for TPS65910Ax

Register

Bit

Description

Option Selected

VDD1_OP_REG

SEL

VDD1 voltage level selection for boot

1.1

VDD1_REG

VGAIN_SEL

VDD1 gain selection, x1 or x2

EEPROM

VDD1 time slot selection

DCDCCTRL_REG

VDD1_PSKIP

VDD1 pulse skip mode enable

Skip enabled

VDD2_OP_REG /

SEL

VDD2 voltage level selection for boot

1.1

VDD2_SR_REG

VDD2_REG

VGAIN_SEL

VDD2 gain selection, x1 or x3

EEPROM

VDD2 time slot selection

DCDCCTRL_REG

VDD2_PSKIP

VDD2 pulse skip mode enable

Skip enabled

TPS65910AA1 1.8V

(DDR2)

TPS65910A3A1 1.5V

VIO_REG

SEL

VIO voltage selection

(DDR3)

TPS65910A31A1 1.5V

(DDR3)

EEPROM

VIO time slot selection

DCDCCTRL_REG

VIO_PSKIP

VIO pulse skip mode enable

Skip enabled

EEPROM

VDD3 time slot

OFF

VDIG1_REG

SEL

LDO voltage selection

1.8

EEPROM

LDO time slot

VDIG2_REG

SEL

LDO voltage selection

1.8

EEPROM

LDO time slot

VDAC_REG

SEL

LDO voltage selection

1.8

EEPROM

LDO time slot

VPLL_REG

SEL

LDO voltage selection

1.8

EEPROM

LDO time slot

VAUX1_REG

SEL

LDO voltage selection

1.8

EEPROM

LDO time slot

VMMC_REG

SEL

LDO voltage selection

3.3

EEPROM

LDO time slot

VAUX33_REG

SEL

LDO voltage selection

3.3

EEPROM

LDO time slot

VAUX2_REG

SEL

LDO voltage selection

3.3

EEPROM

LDO time slot

CLK32KOUT pin

CLK32KOUT time slot

NRESPWRON pin

NRESPWRON time slot

7 + 1

TPS65910AA1 Low-

0 = VRTC LDO will be in low-power mode during

power mode

OFF state.

TPS65910A3A1 Low-

VRTC_REG

VRTC_OFFMASK

1 = VRC LDO will be in full-power mode during

power mode

OFF state.

TPS65910A31A1 High-

power mode

0 = RTC in normal-power mode

DEVCTRL_REG

RTC_PWDN

1 = Clock gating of RTC register and logic, low-

power mode

0 = Clock source is crystal/external clock.

DEVCTRL_REG

CK32K_CTRL

1 = Clock source is internal RC oscillator.

Boot sequence time slot duration:

DEVCTRL2_REG

TSLOT_LENGTH

0 = 0.5 ms

2 ms

1 = 2 ms

TPS65910Ax User's Guide For AM335x Processors

SWCU093C – August 2011 – Revised May 2013

Submit Documentation Feedback

Содержание TPS65910A Series

Страница 1: ...TPS65910Ax User s Guide For AM335x Processors Version C User s Guide Literature Number SWCU093C August 2011 Revised May 2013 ...

Страница 2: ...ibited by U S or other applicable laws without obtaining prior authorisation from U S Department of Commerce and other competent Government authorities to the extent required by those laws This provision shall survive termination or expiration of this Agreement According to our best knowledge of the state and end use of this product or technology and in compliance with the export control regulatio...

Страница 3: ...ource Configuration 10 3 5 Sleep Platform Configuration 10 4 Event Management Through Interrupts 11 4 1 INT_STS_REG VMBHI_IT 11 4 2 INT_STS_REG PWRON_IT 11 4 3 INT_STS_REG PWRON_LP_IT 11 4 4 INT_STS_REG HOTDIE_IT 11 4 5 INT_STS_REG VMBDCH_IT 11 4 6 INT_STS2_REG GPIO_R F_IT 11 4 7 INT_STS_REG RTC_ALARM_IT 11 5 Revision History 12 3 SWCU093C August 2011 Revised May 2013 Table of Contents Submit Docu...

Страница 4: ...y Connections with TPS65910A31 7 3 Power Up and Power Down Timing Diagram 9 List of Tables 1 TPS65910Ax comparison 5 2 EEPROM Configuration for TPS65910Ax 8 3 Revision History 12 4 List of Figures SWCU093C August 2011 Revised May 2013 Submit Documentation Feedback Copyright 2011 2013 Texas Instruments Incorporated ...

Страница 5: ...1 5V Low power mode Low power mode VRTC power mode Full power mode VRTC_REG VRTC_OFFMASK VRTC_REG VRTC_OFFMA in OFF state VRTC_REG VRTC_OFFMASK 1 0 SK 0 2 Connection Diagram and TPS65910Ax EEPROM Definition Figure 1 shows the connection diagram between the processor and the TPS65910A or TPS65910A3 Figure 2 shows the connection diagram between the processor and TPS65910A31 Notes for connection diag...

Страница 6: ...upplying 5 V 5 V VDDS_CORE VDD_MPU VDDSHVx VDDS VDDSHV VDDA3P3V_USB0 1 VDDA1P8V_USB00 1 VDDA_ADC VDDS_RTC 1K 2 VDDIO 1K 2 SCL_SCK SDA_SDI SDASR_EN2 SCLSR_EN1 CLK32KOUT BOOT0 BOOT1 VRTC OSC32KIN OSC32KOUT GPIO1_9 I2C0_SDA I2C0_SCL PORZ PMIC_PWR_EN SPIO_D1 SPIO_CS0 GPIO1_8 PWRHOLD Processor 0 6 to 1 5 V DVS 12 5 mV steps Default ON 1 1 V 0 6 to 1 5 V DVS 12 5 mV steps Default ON 1 1 V 1 5 1 8 2 5 3 ...

Страница 7: ..._SCL PORZ SPIO_D1 SPIO_CS0 GPIO1_8 1K 2 VDDIO 1K 2 SCL_SCK SDA_SDI VDDS_RTC VDDS_DDR VDDSHVx VDDS_PLL_xx VDDS_OSC VDDS_SRAM_CORE_BG VDDS_SRAM_MPU_BB VDDSHVx VDDS VDDSHV VDDA3P3V_USB0 1 VDDA1P8V_USB00 1 VDDA_ADC 1 8 3 3V based on system I O level 1 2 1 5 1 8 2 7 V Default ON 1 8 V 1 0 1 1 1 2 1 8 V Default ON 1 8 V 1 8 2 5 2 8 2 85 V Default ON 1 8 V 1 8 2 8 2 9 3 3 V Default ON 3 3 V 1 8 2 0 2 8 3...

Страница 8: ...EG SEL LDO voltage selection 1 8 EEPROM LDO time slot 2 VDAC_REG SEL LDO voltage selection 1 8 EEPROM LDO time slot 1 VPLL_REG SEL LDO voltage selection 1 8 EEPROM LDO time slot 3 VAUX1_REG SEL LDO voltage selection 1 8 EEPROM LDO time slot 3 VMMC_REG SEL LDO voltage selection 3 3 EEPROM LDO time slot 5 VAUX33_REG SEL LDO voltage selection 3 3 EEPROM LDO time slot 5 VAUX2_REG SEL LDO voltage selec...

Страница 9: ...ion Diagram and TPS65910Ax EEPROM Definition Table 2 EEPROM Configuration for TPS65910Ax continued Register Bit Description Option Selected 0 INT1 signal will be active low DEVCTRL2_REG IT_POL Active high 1 INT1 signal will be active high 0 Device automatically switches on at NO INT_MSK_REG VMBHI_IT_MSK SUPPLY to OFF or BACKUP to OFF transition 1 1 Start up reason is required before switch on Sele...

Страница 10: ...If the SmarReflex interface is not used for viltage scaling power saving these pins can be used to control the power resources Configure two operating voltages for DCDC1 and DCDC2 VDDx_OP_REG SEL Roof voltage ENx ball high VDDx_SR_REG SEL Floor voltage ENx ball low Assign control for DCDC1 to SCLSR_EN1 and DCDC2 to SCLSR_EN2 Set EN1_SMPS_ASS_REG VDD1_EN1 1 Set EN2_SMPS_ASS_REG VDD2_EN1 2 Set SLEEP...

Страница 11: ...t 4 4 INT_STS_REG HOTDIE_IT INT_STS_REG HOTDIE_IT indicates that the temperature of die is reaching the maximum limit Software must take action to decrease the power consumption before automatic shutdown 4 5 INT_STS_REG VMBDCH_IT INT_STS_REG VMBDCH_IT indicates that the input supply is low and the processor must prepare a shutdown to prevent losing data This interrupt is linked to VBAT but does no...

Страница 12: ...date Figure 1 Replace Default OFF with TPS65910Ax EEPROM Figure 1 DEFAULT ON in VDIG1 VDIG2 VAUX1 Definition VAUX33 Connection Diagram and Update Figure 2 Replace Default OFF with TPS65910Ax EEPROM Figure 2 DEFAULT ON in VDIG1 VDIG2 VAUX1 Definition VAUX33 12 TPS65910Ax User s Guide For AM335x Processors SWCU093C August 2011 Revised May 2013 Submit Documentation Feedback Copyright 2011 2013 Texas ...

Страница 13: ...esponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related information or support that may be provided by TI Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failur...

Результаты поиска

Содержание TPS65910A Series

Отзывы:

Бренды по названию

Популярные бренды

Texas Instruments TPS65910A Series, Руководство пользователя

Результаты поиска

Содержание TPS65910A Series

Отзывы:

Бренды по названию

Популярные бренды