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Table 5-2

 shows the jumpers and switches for the EVM.

Table 5-2. Jumpers and Switches

Jumper
Number

Function

Placement

Comment

JP1

Buck1 enable (EN1)

Connect EN1 to GND to disable Vout1, connect EN1 to Vin
through a 100-kΩ resistor to enable Vout1; Leave open to
enable Vout1

JP2

Buck2 enable (EN2)

Connect EN2 to GND to disable Vout2, connect EN2 to Vin
through a 100-kΩ resistor to enable Vout2; Leave open to
enable Vout2

JP7

I

2

C address

I

2

C address configuration pin. Connect this pin to GND to

set address 0x60H; connect it to Vcc to set address 0x61H;
leave it open to set address 0x62H

On board Vcc is 6.25 V

JP8

Mode

Operation mode control pin. Connect this pin to GND to
set forced PWM mode; leave the pin open to set auto PSM-
PWM; connect this pin to Vcc set the IC to run in current
share mode.

JP9

I

2

C Power

Power connected to the I

2

C IO pull-up resistor; Leave the

two pins un-connected set the power to be 3.3V from the I

2

C

interface adaptor; short the two pins set the power to be Vcc.

On board Vcc is 6.25 V

JP15

I

2

C interface connector

Pin 5 is 3.3 V from adaptor; pin 6 is Ground; pin 9 is SCL, pin
10 is SDA.

5.2 Hardware Requirement

This EVM requires an external power supply capable of providing 4.5 V to 18 V at 7 A.

A function generator capable of driving the SYNC pin with 0.4- to 3.3-V amplitude and a 200-kHz to 1.6-MHz
square wave signal is required for synchronization. The EVM kit includes a USB-TO-GPIO interface box which,
when installed on a PC and connected to the EVM, allows communication with the EVM via a GUI interface. The
minimum PC requirements are:

• Windows

®

 2000 or Windows XP operating system

• USB port
• Minimum of 30 MB of free hard disk space (100 MB recommended)
• Minimum of 256 MB of RAM

5.3 Hardware Setup

After connecting the power supply to J1, turn on the power supply, and connect JP1 to Vin through a 100-kΩ
resistor, connect JP2 to Vin through a 100-kΩ resistor, connect JP7 to GND, connect JP8 to GND, the EVM will
regulate the output voltages to the values shown in 

Table 2-1

. Additional input capacitance may be required in

order to mitigate the inductive voltage droop that may occur during a load transient event.

The output voltage is changed by sending the digital control signal via a PC running the TPS65279V controller
software and USB-TO-GPIO interface box. Change the output voltage with the following steps:

• Connect one end of the USB-TO-GPIO box to the PC using the USB cable and the other end to JP15 of the

TPS65279V using the supplied 10-pin ribbon cable as shown in 

Figure 5-2

. The connectors on the ribbon

cable are keyed to prevent incorrect installation.

• Connect the power supply on J1, and turn on the power supply.
• Run the software as explained in the next section.

www.ti.com

Bench Test Setup Conditions

SLVU876A – FEBRUARY 2013 – REVISED MAY 2021

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TPS65279V Buck Converter Evaluation Module User's Guide

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Copyright © 2021 Texas Instruments Incorporated

Содержание TPS65279V

Страница 1: ...4 Figure 4 1 Component Placement Top Layer 5 Figure 4 2 Board Layout Top Layer 6 Figure 4 3 Board Layout Second Layer 6 Figure 4 4 Board Layout Third Layer 7 Figure 4 5 Board Layout Bottom Layer 7 Fig...

Страница 2: ...the support documentation including schematic layout hardware setup software installation and bill of materials Introduction www ti com 2 TPS65279V Buck Converter Evaluation Module User s Guide SLVU87...

Страница 3: ...nverters Table 2 1 presents the performance specification summary for the EVM Table 2 1 Summary of Performance Test Conditions Performance Vin 4 5 V to 18 V Buck1 1 0 V up to 5 A VID control fsw 500 k...

Страница 4: ...V PMIC EVM schematic Figure 3 1 TPS65279V Schematic TPS65279V Schematic www ti com 4 TPS65279V Buck Converter Evaluation Module User s Guide SLVU876A FEBRUARY 2013 REVISED MAY 2021 Submit Document Fee...

Страница 5: ...ed circuit boards for this EVM Figure 4 1 Component Placement Top Layer www ti com Board Layout SLVU876A FEBRUARY 2013 REVISED MAY 2021 Submit Document Feedback TPS65279V Buck Converter Evaluation Mod...

Страница 6: ...r Figure 4 3 Board Layout Second Layer Board Layout www ti com 6 TPS65279V Buck Converter Evaluation Module User s Guide SLVU876A FEBRUARY 2013 REVISED MAY 2021 Submit Document Feedback Copyright 2021...

Страница 7: ...er Figure 4 5 Board Layout Bottom Layer www ti com Board Layout SLVU876A FEBRUARY 2013 REVISED MAY 2021 Submit Document Feedback TPS65279V Buck Converter Evaluation Module User s Guide 7 Copyright 202...

Страница 8: ...2 Figure 5 1 Header Description and Jumper Placement Table 5 1 shows the I O connections for the EVM Table 5 1 Input Output Connection Jumper Number Function Description J1 Vin Connector Apply power s...

Страница 9: ...d for synchronization The EVM kit includes a USB TO GPIO interface box which when installed on a PC and connected to the EVM allows communication with the EVM via a GUI interface The minimum PC requir...

Страница 10: ...ware version is installed the software automatically searches on the internet if connected for updates If a new update is available the software gives notification of the update and downloads and inst...

Страница 11: ...select the output voltage two to configure the buck converter s operation and one for status feedback Changes are made by selecting and checking the components in the GUI on the left hand side and ca...

Страница 12: ...V to J1 3 Toggle JP1 or JP2 to enable Vout1 and Vout2 respectively 4 Apply loads to the output connectors Power Up Procedure www ti com 12 TPS65279V Buck Converter Evaluation Module User s Guide SLVU...

Страница 13: ...Header 14 HEADER 10 PIN 5 1 JP15 HEADER10 3M N2510 6002 RB Ten Pin Header 15 3 3uH 2 L1 L2 IND3 Coilcraft MSS1048 332NLB SMT power inductor 16 100K 2 R1 R2 0603 Generic RES 100k OHM 1 10W 1 0603 SMD...

Страница 14: ...o Revision A May 2021 Page Updated user s guide title 2 Updated the numbering format for tables figures and cross references throughout the document 2 Revision History www ti com 14 TPS65279V Buck Con...

Страница 15: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Страница 16: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Страница 17: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Страница 18: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Страница 19: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Страница 20: ...are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and...

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